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Cameroon Baccalauréat Série F2 - independent subject practice study materials
Cameroon Baccalauréat Série F2 - independent subject practice study resources

Cameroon Baccalauréat Série F2 - independent subject practice practice questions

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Question 1Electronic devices, digital interfaces and embedded reasoning

In an ideal operational amplifier (AOP idéal) operating in linear mode with negative feedback, what are the theoretical values for the differential input voltage ($\varepsilon = V^+ - V^-$) and input bias currents ($I^+, I^-$)?

  1. ε = 0 V (virtual short-circuit / court-circuit virtuel) and I^+ = I^- = 0 A (infinite input impedance) Correct answer.
  2. ε = +15 V and I^+ = I^- = 10 mA
  3. ε = 0 V and I^+ = I^- = infinite
  4. ε = V_sat and I^+ = I^- = 1 mA

Explanation

An ideal op-amp has infinite open-loop voltage gain ($A_{vd} \to \infty$), meaning negative feedback drives the differential input voltage $\varepsilon = V^+ - V^- = 0\text{ V}$ ($V^+ = V^-$). It also has infinite input impedance ($R_{in} \to \infty$), so no current flows into either input terminal ($I^+ = I^- = 0\text{ A}$).

Question 2Electronic devices, digital interfaces and embedded reasoning

In an inverting op-amp amplifier circuit with input resistor $R_1 = 10\text{ k}\Omega$ and feedback resistor $R_2 = 100\text{ k}\Omega$, what is the closed-loop voltage gain $A_v = \frac{V_{out}}{V_{in}}$?

  1. -10 Correct answer.
  2. +10
  3. -11
  4. +11

Explanation

For an inverting op-amp configuration, the closed-loop voltage gain is $A_v = -\frac{R_2}{R_1} = -\frac{100\text{ k}\Omega}{10\text{ k}\Omega} = -10$.

Question 3Electronic devices, digital interfaces and embedded reasoning

A non-inverting op-amp amplifier has $R_1 = 4.7\text{ k}\Omega$ connected from the inverting input to ground and a feedback resistor $R_f = 47\text{ k}\Omega$. If the input signal is $V_{in} = 0.2\text{ V}$, what is the output voltage $V_{out}$?

  1. 2.2 V Correct answer.
  2. 2.0 V
  3. -2.0 V
  4. -2.2 V

Explanation

The gain of a non-inverting amplifier is $A_v = 1 + \frac{R_f}{R_1} = 1 + \frac{47\text{ k}\Omega}{4.7\text{ k}\Omega} = 1 + 10 = 11$. Therefore, $V_{out} = A_v \cdot V_{in} = 11 \times 0.2\text{ V} = 2.2\text{ V}$.

Question 4Electronic devices, digital interfaces and embedded reasoning

What is the primary function of a voltage follower (suiveur de tension / buffer amplifier) with $A_v = 1$ in an electronic circuit?

  1. Impedance matching: provides very high input impedance and very low output impedance to prevent signal attenuation from loading effects Correct answer.
  2. Voltage amplification to boost millivolt signals to 100 volts
  3. Phase shifting by exactly 90 degrees to generate quadrature signals
  4. Rectifying AC signals into pulsating DC current

Explanation

A voltage follower ($V_{out} = V_{in}$) has unity voltage gain but provides impedance isolation (adaptation d'impédance): its near-infinite input impedance draws virtually no current from a high-impedance source, while its near-zero output impedance can drive low-impedance loads without voltage drop.

Question 5Electronic devices, digital interfaces and embedded reasoning

In an op-amp integrator circuit (montage intégrateur) with input resistor $R$ and feedback capacitor $C$, what is the output voltage $v_{out}(t)$ for an input voltage $v_{in}(t)$?

  1. v_{out}(t) = -\frac{1}{R C} \int v_{in}(t) \, dt + V_0 Correct answer.
  2. v_{out}(t) = -R C \frac{dv_{in}(t)}{dt}
  3. v_{out}(t) = -\frac{R}{C} v_{in}(t)
  4. v_{out}(t) = +\frac{1}{R C} \int v_{in}(t) \, dt

Explanation

The virtual ground at the inverting terminal gives $i(t) = \frac{v_{in}(t)}{R}$. All current flows into the feedback capacitor: $i(t) = -C \frac{dv_{out}(t)}{dt} \implies \frac{dv_{out}(t)}{dt} = -\frac{v_{in}(t)}{R C} \implies v_{out}(t) = -\frac{1}{R C} \int v_{in}(t) \, dt + V_0$.

Question 6Electronic devices, digital interfaces and embedded reasoning

What is the cutoff frequency $f_c$ (at -3 dB) of a first-order passive RC low-pass filter with $R = 10\text{ k}\Omega$ and $C = 15.9\text{ nF}$?

  1. 1000 Hz (1 kHz) Correct answer.
  2. 100 Hz
  3. 6283 Hz
  4. 159 Hz

Explanation

The cutoff frequency is $f_c = \frac{1}{2\pi \cdot R \cdot C}$. $R \cdot C = 10000\text{ }\Omega \times 15.9 \times 10^{-9}\text{ F} = 1.59 \times 10^{-4}\text{ s}$. $f_c = \frac{1}{2 \times 3.14159 \times 1.59 \times 10^{-4}} = \frac{1}{9.99026 \times 10^{-4}} \approx 1000\text{ Hz} = 1\text{ kHz}$.

Question 7Electronic devices, digital interfaces and embedded reasoning

A Schmitt trigger (comparateur à hystérésis non inverseur) has switching thresholds at $V_{T+} = +2\text{ V}$ and $V_{T-} = -2\text{ V}$. What is the hysteresis voltage width $\Delta V_H$?

  1. 4 V Correct answer.
  2. 2 V
  3. 0 V
  4. -4 V

Explanation

The hysteresis width is the difference between upper and lower threshold switching voltages: $\Delta V_H = V_{T+} - V_{T-} = 2\text{ V} - (-2\text{ V}) = 4\text{ V}$.

Question 8Electronic devices, digital interfaces and embedded reasoning

In an NPN Bipolar Junction Transistor (BJT) operating in the active linear amplification region, what are the bias conditions for the two internal PN junctions?

  1. Base-Emitter (BE) junction is forward-biased (~0.7 V) and Base-Collector (BC) junction is reverse-biased Correct answer.
  2. Both BE and BC junctions are forward-biased (saturation mode)
  3. Both BE and BC junctions are reverse-biased (cutoff mode)
  4. BE junction is reverse-biased and BC junction is forward-biased (inverted mode)

Explanation

Active linear mode requires the base-emitter junction to be forward-biased ($V_{BE} \approx 0.7\text{ V}$ for silicon) to inject electrons into the base, and the base-collector junction to be reverse-biased ($V_{BC} < 0$, so $V_{CE} > V_{CE,sat}$) to sweep electrons across into the collector.

Question 9Electronic devices, digital interfaces and embedded reasoning

An NPN transistor with common-emitter DC current gain $\beta = 100$ has a base current $I_B = 50\text{ }\mu\text{A}$. What is the collector current $I_C$ in active linear mode?

  1. 5.0 mA Correct answer.
  2. 0.50 mA
  3. 50 mA
  4. 2.0 mA

Explanation

In the active region, $I_C = \beta \cdot I_B = 100 \times 50\text{ }\mu\text{A} = 5000\text{ }\mu\text{A} = 5.0\text{ mA}$.

Question 10Electronic devices, digital interfaces and embedded reasoning

What is the oscillation frequency $f_0$ of a Wien Bridge oscillator with identical RC branches having $R = 10\text{ k}\Omega$ and $C = 10\text{ nF}$?

  1. 1592 Hz (~1.59 kHz) Correct answer.
  2. 3184 Hz
  3. 1000 Hz
  4. 796 Hz

Explanation

The oscillation frequency of a symmetrical Wien bridge is $f_0 = \frac{1}{2\pi \cdot R \cdot C} = \frac{1}{2 \times 3.14159 \times 10000 \times 10 \times 10^{-9}} = \frac{1}{6.28318 \times 10^{-4}} \approx 1591.55\text{ Hz} \approx 1592\text{ Hz}$. (The non-inverting op-amp must provide a gain of $A_v = 1 + R_f/R_1 = 3$).

Question 11Electronic devices, digital interfaces and embedded reasoning

A Common Mode Rejection Ratio (CMRR / TRMC) of an instrumentation differential amplifier is given as $80\text{ dB}$. If the differential gain is $A_d = 1000$, what is the common-mode gain $A_{cm}$?

  1. 0.1 Correct answer.
  2. 10
  3. 0.01
  4. 1.0

Explanation

$\text{CMRR}_{dB} = 20 \log_{10}\left(\frac{A_d}{A_{cm}}\right) \implies 80 = 20 \log_{10}\left(\frac{1000}{A_{cm}}\right) \implies 4 = \log_{10}\left(\frac{1000}{A_{cm}}\right) \implies \frac{1000}{A_{cm}} = 10^4 = 10000 \implies A_{cm} = \frac{1000}{10000} = 0.1$.

Question 12Electronic devices, digital interfaces and embedded reasoning

What is the primary operational difference between an N-channel enhancement-mode MOSFET (MOSFET à enrichissement) and a depletion-mode MOSFET (à appauvrissement)?

  1. An enhancement MOSFET is normally-off at V_GS = 0 V and requires positive V_GS > V_th to create a conductive channel, while a depletion MOSFET is normally-on at V_GS = 0 V Correct answer.
  2. An enhancement MOSFET conducts only negative current through the gate terminal
  3. Depletion MOSFETs cannot operate at high switching frequencies
  4. Enhancement MOSFETs have no gate oxide insulation layer

Explanation

Enhancement-mode MOSFETs (transistor à enrichissement) have no physical channel at zero gate voltage ($V_{GS} = 0\text{ V}$) and are normally-off. Applying a positive gate voltage $V_{GS} > V_{th}$ inverts the substrate and creates a conductive n-channel. Depletion MOSFETs have a built-in channel and are normally-on at $V_{GS} = 0\text{ V}$.

Question 13Electronic devices, digital interfaces and embedded reasoning

In a Sallen-Key second-order active low-pass filter, what is the asymptotic high-frequency attenuation roll-off rate on a Bode magnitude plot?

  1. -40 dB/decade (or -12 dB/octave) Correct answer.
  2. -20 dB/decade (or -6 dB/octave)
  3. -60 dB/decade (or -18 dB/octave)
  4. 0 dB/decade

Explanation

Each pole of a filter contributes $-20\text{ dB/decade}$ of high-frequency attenuation slope. A second-order filter (like a 2-pole Sallen-Key) has two poles, producing an asymptotic roll-off slope of $-40\text{ dB/decade}$ (equivalent to $-12\text{ dB/octave}$).

Question 14Electronic devices, digital interfaces and embedded reasoning

A classic NE555 timer is wired as an astable multivibrator with $R_A = 4.7\text{ k}\Omega$, $R_B = 10\text{ k}\Omega$, and timing capacitor $C = 100\text{ nF}$. What is the high output time duration $t_{high}$ during each cycle?

  1. 1.02 ms Correct answer.
  2. 0.693 ms
  3. 1.47 ms
  4. 2.04 ms

Explanation

In a 555 astable circuit, capacitor $C$ charges through $(R_A + R_B)$ from $V_{CC}/3$ to $2V_{CC}/3$. The charging time is $t_{high} = \ln(2) \cdot (R_A + R_B) \cdot C = 0.69315 \times (4700 + 10000)\text{ }\Omega \times 100 \times 10^{-9}\text{ F} = 0.69315 \times 14700 \times 10^{-7} \approx 1.0189\text{ ms} \approx 1.02\text{ ms}$.

Question 15Electronic devices, digital interfaces and embedded reasoning

What is the slew rate ($SR$) of an operational amplifier, and what distortion does it cause when an input signal frequency is too high?

  1. The maximum rate of change of output voltage over time (V/μs); exceeding it causes a sinusoidal output to distort into a triangular waveform Correct answer.
  2. The ratio of input impedance to output impedance
  3. The DC output offset drift with ambient temperature
  4. The bandwidth reduction caused by capacitive loading on the inverting pin

Explanation

Slew Rate is defined as $SR = \left(\frac{dv_{out}}{dt}\right)_{max}$ (typically expressed in $\text{V/}\mu\text{s}$). If a sinusoid $v_{out}(t) = V_p \sin(2\pi f t)$ demands a slope $2\pi f V_p > SR$, internal compensation charging currents saturate, causing slew-rate limiting that turns the sine wave into a triangular wave.

Question 16Electronic devices, digital interfaces and embedded reasoning

A 3-op-amp instrumentation amplifier uses precision resistors with $R_1 = 10\text{ k}\Omega$ and a single external gain resistor $R_G = 1\text{ k}\Omega$ in the input differential stage, while the second differential stage has unity gain ($R_3/R_2 = 1$). What is the overall differential gain $A_d$?

  1. 21 Correct answer.
  2. 20
  3. 11
  4. 10

Explanation

The standard instrumentation amplifier gain formula is $A_d = \left(1 + \frac{2R_1}{R_G}\right) \cdot \frac{R_3}{R_2}$. Substituting values: $A_d = \left(1 + \frac{2 \times 10\text{ k}\Omega}{1\text{ k}\Omega}\right) \times 1 = 1 + 20 = 21$.

Question 17Electronic devices, digital interfaces and embedded reasoning

An ideal fourth-order Butterworth low-pass filter has cutoff10kHz. What is its approximate magnitude attenuation at100kHz, one decade above cutoff?

  1. -80 dB Correct answer.
  2. -40 dB
  3. -20 dB
  4. -120 dB

Explanation

A Butterworth filter of order $n$ has an asymptotic roll-off rate of $-20n\text{ dB/decade}$. For $n = 4$, the roll-off rate is $-20 \times 4 = -80\text{ dB/decade}$. One decade above cutoff ($100\text{ kHz} = 10 \times 10\text{ kHz}$), the attenuation is $-80\text{ dB}$.

Question 18Electronic devices, digital interfaces and embedded reasoning

What is the voltage gain $A_v = v_{out}/v_{in}$ of an ideal op-amp summing amplifier (sommateur inverseur) with three inputs $V_1, V_2, V_3$ through input resistors $R_1 = 10\text{ k}\Omega, R_2 = 20\text{ k}\Omega, R_3 = 5\text{ k}\Omega$ and feedback resistor $R_f = 20\text{ k}\Omega$?

  1. v_{out} = -(2 V_1 + 1 V_2 + 4 V_3) Correct answer.
  2. v_{out} = +(2 V_1 + 1 V_2 + 4 V_3)
  3. v_{out} = -(0.5 V_1 + 1 V_2 + 0.25 V_3)
  4. v_{out} = -(V_1 + V_2 + V_3)

Explanation

For an inverting summer, $v_{out} = -\left(\frac{R_f}{R_1} V_1 + \frac{R_f}{R_2} V_2 + \frac{R_f}{R_3} V_3\right) = -\left(\frac{20}{10} V_1 + \frac{20}{20} V_2 + \frac{20}{5} V_3\right) = -(2 V_1 + V_2 + 4 V_3)$.

Question 19Electronic devices, digital interfaces and embedded reasoning

An ideal dominant-pole op-amp has a4MHzgain-bandwidth product. A non-inverting stage has closed-loop gain100(40dB). Using the constant-GBW approximation, what is its approximate−3dBbandwidth?

  1. 40 kHz Correct answer.
  2. 400 kHz
  3. 4 kHz
  4. 4 MHz

Explanation

For the stipulated non-inverting dominant-pole model, the closed-loop noise gain is100. Approximate bandwidth is GBW/noise gain=4000000/100=40000Hz=40kHz. Actual amplifiers require their documented stability, loading, frequency response and operating limits to be checked.

Question 20Electronic devices, digital interfaces and embedded reasoning

In a microcontroller system architecture (Harvard architecture vs Von Neumann architecture), what is the defining feature of the Harvard architecture?

  1. Separate physical memory spaces and separate data/address buses for program instructions (Flash) and runtime data (RAM) Correct answer.
  2. A single unified memory bus shared sequentially between program code and data variables
  3. The complete absence of an Arithmetic Logic Unit (ALU)
  4. Operation without an external clock oscillator

Explanation

The Harvard architecture uses physically separate memory blocks and separate buses for instructions (Program Memory) and operands (Data Memory). This allows the CPU to fetch an instruction and read/write data memory simultaneously in the same clock cycle.

Question 21Electronic devices, digital interfaces and embedded reasoning

In the I2C (Inter-Integrated Circuit) synchronous serial communication protocol, what are the two physical signal lines used, and what type of output pin stage is required?

  1. SDA (Serial Data) and SCL (Serial Clock), requiring open-drain / open-collector outputs with external pull-up resistors Correct answer.
  2. TX (Transmit) and RX (Receive), with push-pull CMOS outputs
  3. MOSI, MISO, SCK, and SS, with push-pull outputs
  4. CAN_H and CAN_L, with differential terminated lines

Explanation

I2C uses two bidirectional lines: $SDA$ (Serial Data) and $SCL$ (Serial Clock). Both lines require open-drain output drivers with pull-up resistors ($R_p \approx 4.7\text{ k}\Omega$), allowing multiple master/slave devices to connect in a wired-AND configuration without bus conflict.

Question 22Electronic devices, digital interfaces and embedded reasoning

In serial asynchronous communication (UART), what does a configuration setting designated as '9600, 8-N-1' specify?

  1. Baud rate of 9600 baud, 8 data bits, No parity bit, 1 stop bit Correct answer.
  2. 9600 bytes per second, 8 stop bits, Negative logic, 1 start bit
  3. 9600 kHz carrier frequency, 8 channels, Non-inverting, 1 parity bit
  4. 9600 bits per frame, 8-bit CRC, No flow control, 1 data line

Explanation

In UART standards: 9600 specifies the transmission speed in bits per second (baud); '8' means 8 data bits per character; 'N' means No parity check; '1' specifies 1 Stop bit at the end of each frame.

Question 23Electronic devices, digital interfaces and embedded reasoning

What is the primary operational advantage of the SPI (Serial Peripheral Interface) bus compared to I2C?

  1. Full-duplex high-speed synchronous data transfer (often >10–50 Mbps) with simpler hardware protocols and lower software overhead Correct answer.
  2. SPI uses fewer wires than I2C for 10 slave devices
  3. SPI incorporates automatic built-in hardware error acknowledgment (ACK/NACK)
  4. SPI can transmit across 1000 meters of unshielded cable

Explanation

SPI is a full-duplex synchronous 4-wire bus (MOSI, MISO, SCK, SS) capable of high clock rates ($10-50+\text{ Mbps}$) with simple shift-register hardware and zero software packet overhead, compared to I2C's standard $400\text{ kbps}$ limit.

Question 24Electronic devices, digital interfaces and embedded reasoning

What type of temperature sensor uses a platinum wire whose electrical resistance increases linearly with temperature according to $R(T) = R_0(1 + A \cdot T)$ ($R_0 = 100\text{ }\Omega$ at $0^\circ\text{C}$)?

  1. RTD Pt100 probe (sonde thermométrique à résistance de platine) Correct answer.
  2. NTC Thermistor (thermistance CTN)
  3. K-type Thermocouple (couple thermoélectrique Chromel-Alumel)
  4. Infrared Photodiode

Explanation

A Pt100 sensor is a Platinum Resistance Temperature Detector (RTD) with a standardized resistance of $100.0\text{ }\Omega$ at $0^\circ\text{C}$ and a positive linear temperature coefficient ($\\alpha \approx +0.00385\text{ }\Omega/\Omega/^\circ\text{C}$).

Question 25Electronic devices, digital interfaces and embedded reasoning

What is the Seebeck effect (effet Seebeck) utilized in thermocouples for industrial temperature measurement?

  1. The generation of an open-circuit thermoelectric electromotive force (EMF in mV) proportional to the temperature difference between two dissimilar metal junctions Correct answer.
  2. The change in electrical capacitance under mechanical pressure
  3. The emission of electrons when illuminated by ultraviolet light
  4. The rotation of the plane of polarization of light in a magnetic field

Explanation

The Seebeck effect creates an electrical potential difference (thermoelectric voltage $V = S \cdot \Delta T$) when two conductors of dissimilar metals are joined at two junctions maintained at different temperatures (hot measurement junction vs cold reference junction).

Question 26Electronic devices, digital interfaces and embedded reasoning

A microcontroller has a 16-bit timer clocked at $f_{timer} = 16\text{ MHz}$. With a prescaler division factor of 64, what is the timer tick period, and what is the maximum overflow time $T_{overflow}$?

  1. Tick = 4.0 μs; T_overflow = 262.144 ms Correct answer.
  2. Tick = 1.0 μs; T_overflow = 65.536 ms
  3. Tick = 0.0625 μs; T_overflow = 4.096 ms
  4. Tick = 16 μs; T_overflow = 1.048 s

Explanation

Timer clock after prescaler: $f_{cnt} = \frac{16\text{ MHz}}{64} = 250\text{ kHz}$. Tick duration: $T_{tick} = \frac{1}{250000\text{ Hz}} = 4.0 \times 10^{-6}\text{ s} = 4.0\text{ }\mu\text{s}$. A 16-bit timer overflows after $2^{16} = 65536\text{ counts}$. $T_{overflow} = 65536 \times 4.0\text{ }\mu\text{s} = 262144\text{ }\mu\text{s} = 262.144\text{ ms}$.

Question 27Electronic devices, digital interfaces and embedded reasoning

What is the purpose of Pulse-Width Modulation (PWM / MLI - Modulation de Largeur d'Impulsion) in microcontroller-driven DC motor speed control?

  1. To vary the average DC voltage and power delivered to the motor by adjusting the pulse duty cycle while switching transistors at high efficiency with minimal heat dissipation Correct answer.
  2. To change the frequency of the AC mains power grid
  3. To measure the rotor angular position through optical pulses
  4. To step down DC voltage using linear resistive dropping

Explanation

PWM rapidly switches power transistors fully ON ($V_{CE} \approx 0$, low power loss) and fully OFF ($I = 0$, zero power loss) at a fixed carrier frequency. The average output voltage is $V_{avg} = \alpha \cdot V_{CC}$, where duty cycle $\alpha = t_{on}/T$, providing efficient speed control without burning energy in linear resistors.

Question 28Electronic devices, digital interfaces and embedded reasoning

In Amplitude Modulation (AM / Modulation d'Amplitude), if a sinusoidal carrier of frequency $f_c = 1000\text{ kHz}$ is modulated by an audio tone of frequency $f_m = 5\text{ kHz}$, what frequencies are present in the resulting AM signal spectrum?

  1. 995 kHz (Lower Sideband), 1000 kHz (Carrier), and 1005 kHz (Upper Sideband) Correct answer.
  2. 1000 kHz and 5 kHz only
  3. 990 kHz, 1000 kHz, and 1010 kHz
  4. 200 kHz and 5000 kHz

Explanation

Standard double-sideband full-carrier AM produces three spectral lines: the carrier at $f_c = 1000\text{ kHz}$, the Lower Sideband at $f_c - f_m = 1000 - 5 = 995\text{ kHz}$, and the Upper Sideband at $f_c + f_m = 1000 + 5 = 1005\text{ kHz}$. Total occupied bandwidth is $B = 2 f_m = 10\text{ kHz}$.

Question 29Electronic devices, digital interfaces and embedded reasoning

What is the modulation index $m$ of an AM signal whose maximum envelope voltage is $V_{max} = 12\text{ V}$ and minimum envelope voltage is $V_{min} = 4\text{ V}$?

  1. 0.50 (50%) Correct answer.
  2. 0.33 (33%)
  3. 0.75 (75%)
  4. 1.00 (100%)

Explanation

The modulation index from an envelope oscilloscope display is $m = \frac{V_{max} - V_{min}}{V_{max} + V_{min}} = \frac{12\text{ V} - 4\text{ V}}{12\text{ V} + 4\text{ V}} = \frac{8}{16} = 0.50 = 50\%$.

Question 30Electronic devices, digital interfaces and embedded reasoning

In Frequency Modulation (FM / Modulation de Fréquence), Carson's rule states that the transmission bandwidth $B_T$ for a frequency deviation $\Delta f = 75\text{ kHz}$ and maximum modulating audio frequency $f_m = 15\text{ kHz}$ is approximately:

  1. 180 kHz Correct answer.
  2. 150 kHz
  3. 90 kHz
  4. 30 kHz

Explanation

Carson's bandwidth rule for FM is $B_T = 2(\Delta f + f_m) = 2(75\text{ kHz} + 15\text{ kHz}) = 2 \times 90\text{ kHz} = 180\text{ kHz}$. (Standard broadcast FM stations are allocated 200 kHz channel spacing).

Question 31Electronic devices, digital interfaces and embedded reasoning

What is the purpose of an optocoupler (photocoupleur / opto-isolateur) in an industrial microcontroller interface board?

  1. To provide galvanic electrical isolation (optical coupling) between low-voltage digital control logic and high-voltage noisy actuator loads Correct answer.
  2. To amplify audio signals up to 100 watts
  3. To convert 3-phase AC power directly into DC voltage
  4. To measure ambient ambient light level in lux

Explanation

An optocoupler consists of an infrared LED optically paired with a phototransistor inside a light-tight package. It transmits logic signals via photons, providing complete galvanic isolation ($2.5-5\text{ kV}$) that protects microcontrollers from ground loops, high-voltage inductive spikes, and industrial noise.

Question 32Electronic devices, digital interfaces and embedded reasoning

A strain gauge (jauge de déformation / jauge de contrainte) with initial resistance $R = 120.0\text{ }\Omega$ and gauge factor $K = 2.0$ experiences a strain $\varepsilon = 1000\text{ }\mu\text{m/m}$ ($10^{-3}$). What is the change in resistance $\Delta R$?

  1. 0.24 Ω Correct answer.
  2. 2.4 Ω
  3. 0.024 Ω
  4. 24.0 Ω

Explanation

The strain gauge equation is $\frac{\Delta R}{R} = K \cdot \varepsilon \implies \Delta R = R \cdot K \cdot \varepsilon = 120\text{ }\Omega \times 2.0 \times 10^{-3} = 0.24\text{ }\Omega$.

Question 33Electronic devices, digital interfaces and embedded reasoning

In a balanced Wheatstone bridge with four identical resistors $R_1 = R_2 = R_3 = R_4 = R$ excited by voltage $E$, one active strain gauge changes by $\Delta R$ (where $\Delta R \ll R$). What is the resulting output voltage $\Delta V_{out}$ across the bridge detector terminals?

  1. \Delta V_{out} \approx \frac{E}{4} \cdot \frac{\Delta R}{R} Correct answer.
  2. \Delta V_{out} = E \cdot \frac{\Delta R}{R}
  3. \Delta V_{out} = \frac{E}{2} \cdot \frac{\Delta R}{R}
  4. \Delta V_{out} = \frac{E}{8} \cdot \frac{\Delta R}{R}

Explanation

For a single active quarter-bridge (montage en quart de pont): $V_{out} = E \left(\frac{R + \Delta R}{2R + \Delta R} - \frac{R}{2R}\right) = E \left(\frac{R + \Delta R}{2R + \Delta R} - \frac{1}{2}\right) = E \left(\frac{2R + 2\Delta R - 2R - \Delta R}{2(2R + \Delta R)}\right) \approx \frac{E}{4} \frac{\Delta R}{R}$ for $\Delta R \ll R$.

Question 34Electronic devices, digital interfaces and embedded reasoning

What is the function of an external Watchdog Timer (chien de garde / WDT) in a critical embedded microcontroller system?

  1. To automatically reset the microcontroller if the main program crashes or enters an infinite hang loop and fails to clear the timer periodically Correct answer.
  2. To synchronize real-time clock time-stamps with GPS satellites
  3. To regulate battery charging voltage
  4. To protect flash memory from being overwritten by hackers

Explanation

A Watchdog Timer is an autonomous countdown timer. The running software must periodically 'pet/kick' (refresh) the watchdog. If the firmware crashes, hangs in an infinite loop, or halts due to ESD latchup, the watchdog reaches zero and asserts a hardware RESET to restore normal operation.

Question 35Electronic devices, digital interfaces and embedded reasoning

In Hall effect magnetic sensors (capteur à effet Hall), how is the generated Hall voltage $V_H$ related to magnetic flux density $B$ and bias current $I$?

  1. V_H = R_H \cdot \frac{I \cdot B}{t} (proportional to both current I and magnetic field B, inversely proportional to thickness t) Correct answer.
  2. V_H = \frac{I}{B \cdot t}
  3. V_H = B^2 \cdot I \cdot t
  4. V_H = \frac{R_H}{I \cdot B}

Explanation

When charge carriers flow with current $I$ through a semiconductor slab of thickness $t$ in a perpendicular magnetic field $B$, the Lorentz force deflects carriers to one edge, generating the Hall voltage: $V_H = \frac{R_H \cdot I \cdot B}{t}$, where $R_H = \frac{1}{n q}$ is the Hall coefficient.

Question 36Electronic devices, digital interfaces and embedded reasoning

A microcontroller interrupt service routine (ISR) must execute with minimal latency. Why should delay functions, lengthy calculations, and blocking serial prints NEVER be placed inside an ISR?

  1. Because an ISR blocks other interrupts of equal or lower priority, causing system unresponsiveness, missed timing deadlines, and buffer overruns Correct answer.
  2. Because delay functions permanently erase the microcontroller's RAM
  3. Because the compiler refuses to compile any code containing more than 2 lines inside an ISR
  4. Because the CPU clock speed drops to zero during interrupt execution

Explanation

ISRs should be kept as short as possible (e.g. set a flag, read a register, reload a timer, and exit). Lengthy delays inside an ISR block other nested interrupts and prevent the background main loop from executing, leading to missed hardware events and buffer overflow.

Question 37Electronic devices, digital interfaces and embedded reasoning

What is the purpose of a sample-and-hold circuit (échantillonneur-bloqueur) at the analog input of an ADC?

  1. To freeze and hold the sampled analog voltage constant on a capacitor during the conversion interval, preventing conversion errors from rapidly changing inputs Correct answer.
  2. To convert DC voltages into pure sine waves
  3. To amplify the analog voltage by a factor of 1000
  4. To isolate the microcontroller ground from the mains earth ground

Explanation

If the input voltage changes by more than $\pm 1/2\text{ LSB}$ while a SAR or ramp ADC is determining binary bits, conversion results will be corrupted. A sample-and-hold circuit closes a switch to sample the input onto a precision capacitor, then opens the switch to hold the voltage steady for the ADC conversion.

Question 38Electronic devices, digital interfaces and embedded reasoning

In Phase-Locked Loop (PLL / Boucle à Verrouillage de Phase) systems, what are the three fundamental functional blocks connected in a closed loop?

  1. Phase Detector (Comparateur de phase), Low-Pass Loop Filter (Filtre passe-bas), and Voltage-Controlled Oscillator (VCO / Oscillateur commandé en tension) Correct answer.
  2. Rectifier, Transformer, and Filter Capacitor
  3. Full Adder, Multiplexer, and Shift Register
  4. Op-amp Inverter, Schmitt Trigger, and 555 Timer

Explanation

A PLL consists of: 1) A Phase Detector that outputs a voltage proportional to the phase difference between input reference and feedback signals; 2) A Low-Pass Loop Filter that smooths the phase error into a DC control voltage; 3) A Voltage-Controlled Oscillator (VCO) whose output frequency shifts until phase lock is achieved.

Question 39Electronic devices, digital interfaces and embedded reasoning

What is the function of a Flyback Diode (diode de roue libre) connected in reverse parallel across an inductive relay coil or DC motor?

  1. To suppress inductive flyback voltage spikes (e = -L di/dt) when the driving transistor turns off, protecting the transistor from overvoltage destruction Correct answer.
  2. To rectify the DC supply into AC current
  3. To increase the speed of the motor by 50%
  4. To illuminate as a status indicator LED

Explanation

When the switching transistor turns OFF, inductor current cannot drop to zero instantaneously ($e = -L \frac{di}{dt}$). Without a flyback diode, the collapsing magnetic field induces a massive positive voltage spike (often hundreds of volts) across the collector/drain, causing avalanche breakdown. The diode clamps the spike to $\sim 0.7\text{ V}$ and recirculates the current safely.

Question 40Electronic devices, digital interfaces and embedded reasoning

In a linear regulated DC power supply, what is the fixed regulated output voltage of an industry-standard '7805' 3-terminal positive voltage regulator IC?

  1. +5.0 V Correct answer.
  2. +12.0 V
  3. +15.0 V
  4. -5.0 V

Explanation

The 78xx series designates fixed positive linear voltage regulators, where the last two digits indicate the output voltage: 7805 outputs $+5.0\text{ V}$, 7812 outputs $+12.0\text{ V}$, and 7815 outputs $+15.0\text{ V}$. Negative regulators belong to the 79xx series (e.g. 7905 outputs $-5.0\text{ V}$).

Question 41Electronic devices, digital interfaces and embedded reasoning

What is the nominal capacitance value and tolerance of a ceramic disc capacitor marked with the 3-digit EIA code '104K'?

  1. 100 nF (0.1 μF) with ±10% tolerance Correct answer.
  2. 104 pF with ±5% tolerance
  3. 10.4 nF with ±20% tolerance
  4. 1.0 μF with ±1% tolerance

Explanation

In 3-digit EIA capacitor coding: first two digits are significant figures (10), third digit is the power-of-ten multiplier in picofarads ($10^4 = 10000$). Thus, $10 \times 10^4\text{ pF} = 100000\text{ pF} = 100\text{ nF} = 0.1\text{ }\mu\text{F}$. The letter 'K' indicates $\pm 10\%$, 'J' is $\pm 5\%$, and 'M' is $\pm 20\%$.

Question 42Electronic devices, digital interfaces and embedded reasoning

What is the nominal resistance and tolerance of a 4-band axial resistor with color bands: Yellow - Violet - Orange - Gold?

  1. 47 kΩ ±5% Correct answer.
  2. 4.7 kΩ ±10%
  3. 470 kΩ ±5%
  4. 47 Ω ±1%

Explanation

Standard 4-band resistor color code: Yellow = 4, Violet = 7, Orange = multiplier $10^3$ ($1000$). Value = $47 \times 10^3\text{ }\Omega = 47\text{ k}\Omega$. Gold 4th band = $\pm 5\%$ tolerance (Silver is $\pm 10\%$, Brown is $\pm 1\%$).

Question 43Electronic devices, digital interfaces and embedded reasoning

What is the peak-to-peak ripple voltage $\Delta V_r$ across a filter capacitor $C = 1000\text{ }\mu\text{F}$ in a 50 Hz full-wave bridge rectifier circuit supplying a DC load current $I_{load} = 0.5\text{ A}$?

  1. 5.0 V Correct answer.
  2. 10.0 V
  3. 2.5 V
  4. 1.0 V

Explanation

In a full-wave bridge rectifier fed by a 50 Hz mains line, the ripple frequency is $f_r = 2 \times 50\text{ Hz} = 100\text{ Hz}$. Ripple voltage is $\Delta V_r = \frac{I_{load}}{f_r \cdot C} = \frac{0.5\text{ A}}{100\text{ Hz} \times 1000 \times 10^{-6}\text{ F}} = \frac{0.5}{0.1} = 5.0\text{ V}$.

Question 44Electronic devices, digital interfaces and embedded reasoning

Why are $0.1\text{ }\mu\text{F}$ ceramic decoupling capacitors (condensateurs de découplage) placed as close as physically possible to the $V_{CC}$ and $GND$ power pins of each digital IC on a printed circuit board (PCB)?

  1. To provide a local low-inductance reservoir that shunts high-frequency switching current spikes to ground, preventing power rail noise and voltage droop Correct answer.
  2. To step down the mains 230 V AC voltage directly into the IC
  3. To serve as timing capacitors for internal clock generation
  4. To increase the overall resistance of the circuit board traces

Explanation

When digital logic gates switch states, they draw rapid transient current spikes (current surge) from the power rail. Long PCB traces have parasitic inductance ($L \frac{di}{dt}$) that causes voltage drops (ground bounce and rail sag). A local ceramic capacitor provides low impedance at high frequencies right at the IC pins.

Question 45Electronic devices, digital interfaces and embedded reasoning

In PCB layout design, why should right-angle $90^\circ$ trace corners be replaced with $45^\circ$ chamfers or curved circular arcs for high-speed signals?

  1. To maintain uniform trace characteristic impedance, minimize parasitic capacitance at corners, and reduce electromagnetic radiation (EMI) Correct answer.
  2. Because PCB manufacturing machines cannot etch 90° lines
  3. To save copper material and reduce board manufacturing weight
  4. To increase the DC current capacity of the signal trace by 200%

Explanation

Sharp $90^\circ$ corners increase trace width locally, creating an impedance discontinuity (capacitive bump) that causes signal reflections for high-speed signal edges and acts as a localized antenna radiating electromagnetic interference (EMI). Using $45^\circ$ bends maintains smooth impedance continuity.

Question 46Electronic devices, digital interfaces and embedded reasoning

What is the primary advantage of a Switched-Mode Power Supply (SMPS / alimentation à découpage) compared to a traditional linear regulated power supply?

  1. Much higher energy efficiency (typically 80–95%) with dramatically smaller and lighter high-frequency transformers and minimal heatsinking requirements Correct answer.
  2. Completely zero electromagnetic interference (EMI) noise without needing any filtering
  3. Simpler schematic with fewer electronic components than a linear supply
  4. Direct conversion of DC without any switching semiconductors

Explanation

SMPS circuits switch power transistors at high frequencies ($50\text{ kHz}-1\text{ MHz}$), operating transistors in saturation or cutoff (negligible power dissipation, 80-95% efficiency). High frequency also allows compact ferrite transformers and filter inductors compared to bulky 50 Hz iron-core transformers.

Question 47Electronic devices, digital interfaces and embedded reasoning

When troubleshooting an amplifier circuit on a breadboard, an oscilloscope probe set to 10X attenuation displays a sinusoidal signal with a peak-to-peak amplitude of 4 divisions on a vertical scale of $0.5\text{ V/div}$. What is the actual true peak-to-peak voltage $V_{pp}$ of the circuit node?

  1. 20.0 V Correct answer.
  2. 2.0 V
  3. 0.2 V
  4. 10.0 V

Explanation

Measured screen voltage = $\text{Divisions} \times \text{Scale} = 4\text{ div} \times 0.5\text{ V/div} = 2.0\text{ V}$. Because a 10X probe divides the signal by 10 before reaching the scope input, the true circuit node voltage is $V_{pp} = 2.0\text{ V} \times 10 = 20.0\text{ V}$.

Question 48Electronic devices, digital interfaces and embedded reasoning

In a printed circuit board assembly, what is the purpose of an unbroken continuous Ground Plane (plan de masse) on an inner PCB layer?

  1. Provides a low-impedance return path for all high-frequency signals, minimizes loop areas to reduce EMI, and provides effective thermal dissipation Correct answer.
  2. Insulates the board against moisture and oxidation
  3. Acts as a structural stiffener to prevent physical board flexure under heavy connectors
  4. Prevents electric current from reaching the chassis earth ground

Explanation

A continuous ground plane provides a direct, minimal-inductance return path directly underneath signal traces, minimizing the electromagnetic loop area ($A$) and thereby dramatically reducing radiated emissions and susceptibility while stabilizing reference potentials.

Question 49Electronic devices, digital interfaces and embedded reasoning

What electronic component is used to clamp fast high-voltage electrostatic discharge (ESD) transients and lightning surges across data lines to protect sensitive CMOS inputs?

  1. TVS Diode (Transient Voltage Suppressor / Diode Transil) Correct answer.
  2. High-power carbon composition heating resistor
  3. Electrolytic filter capacitor
  4. PTC self-resetting fuse

Explanation

Transient Voltage Suppressor (TVS / Transil) diodes have sub-nanosecond response times and high peak pulse power ratings. Under normal voltage they exhibit high impedance; when an overvoltage ESD transient exceeds breakdown voltage $V_{BR}$, they avalanche instantaneously, clamping the surge safely to ground.

Question 50Electronic devices, digital interfaces and embedded reasoning

In an LM317 adjustable linear voltage regulator circuit, the output voltage is given by $V_{out} = 1.25\text{ V} \cdot \left(1 + \frac{R_2}{R_1}\right) + I_{adj} \cdot R_2$. If $R_1 = 240\text{ }\Omega$ and $R_2 = 2160\text{ }\Omega$ (neglecting $I_{adj}$), what is the regulated output voltage $V_{out}$?

  1. 12.5 V Correct answer.
  2. 10.0 V
  3. 15.0 V
  4. 5.0 V

Explanation

$V_{out} = 1.25 \times \left(1 + \frac{2160}{240}\right) = 1.25 \times (1 + 9) = 1.25 \times 10 = 12.5\text{ V}$.