Computer Systems Fundamentals and Architecture
Domain 1 tests quantitative fundamentals: number representation, CPU organization, memory hierarchy and reliability arithmetic. Morning questions are computations disguised as recall, so practise the formulas until you can apply them under time pressure.
Data representation
- Two's complement with n bits spans −2^(n−1) to 2^(n−1)−1; overflow occurs only when two operands of the same sign produce a result of the opposite sign.
- IEEE 754 single precision: 1 sign bit, 8 biased exponent bits (bias 127), 23 fraction bits; normalized value = (−1)^s × 1.F × 2^(E−127). Double uses bias 1023 and 52 fraction bits.
- Fixed-point arithmetic is exact but range-limited; floating point trades precision for range, and testing floats for equality is unreliable.
CPU and instruction sets
- A k-stage pipeline has ideal speedup k, reduced by structural, data and control hazards; forwarding and branch prediction recover part of the loss.
- CISC favours compact code and rich addressing modes; RISC favours fixed-length instructions, load/store architecture and deep pipelining.
- I/O modes: program-controlled polling, interrupt-driven transfer, and DMA, which moves blocks without per-byte CPU involvement.
Memory, storage and reliability
- Locality (temporal and spatial) justifies caches. Average access time T = h·Tc + (1−h)·Tm, where h is the hit ratio.
- RAID 0 stripes with no redundancy; RAID 1 mirrors; RAID 5 uses distributed parity and yields (n−1) disks of capacity; RAID 6 survives two failures; RAID 10 mirrors stripes.
- Series reliability R = ΠRi; parallel redundancy R = 1 − Π(1−Ri); availability A = MTBF / (MTBF + MTTR).
- Amdahl's law: speedup = 1 / ((1−f) + f/s).
Worked example
A workload spends 40% of its runtime in a module made 5× faster. With f = 0.4 and s = 5, speedup = 1 / (0.6 + 0.08) = 1.47. If the question asks for the maximum achievable speedup, the answer is 1/0.6 ≈ 1.67, because the untouched 60% becomes the bound; making the module infinitely fast cannot beat it.
Traps
- Reporting Amdahl speedup as f/s, or ignoring the ceiling when maximum is asked.
- Mixing the IEEE 754 single bias (127) with the double bias (1023) in one item.
- Giving RAID 5 capacity as n×disk instead of (n−1)×disk.
- Writing availability as MTTR/MTBF.
- Assuming deeper pipelines always raise throughput; stalls and latency say otherwise.