ESE ECE Prelims study materials
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ESE ECE Prelims: Analog and Digital Circuits

ESE ECE Prelims · Work through your exam, one topic at a time.

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Analog and Digital Circuits

This domain pairs op-amp and feedback circuits with combinational and sequential logic, data converters and logic families. Questions often combine an analog design step with a timing or resolution calculation.

Core rules

  • Ideal op-amp with negative feedback: virtual short (V+ = V−) and zero input current. Inverting gain = −Rf/Rin; non-inverting gain = 1 + Rf/Rin.
  • Barkhausen criterion: loop gain |Aβ| = 1 at 0° or 360° phase; the Wien-bridge oscillator needs a non-inverting gain of 3, i.e. Rf/Rin = 2.
  • Setup and hold times are timing constraints on data relative to the clock edge, not propagation delays.
  • An n-bit ripple counter divides by 2ⁿ; ADC resolution = VFS/2ⁿ and quantization error is ±½ LSB.

Worked example

An inverting amplifier uses Rin = 2 kΩ and Rf = 20 kΩ, driven by 0.25 V with ±12 V supplies. Closed-loop gain = −20/2 = −10, so the ideal output is −2.5 V, comfortably inside the rails. If the op-amp slews at 0.5 V/µs and must deliver a 2.5 V amplitude sine at 20 kHz, the required slew rate is 2πfV = 2π(20 kHz)(2.5) ≈ 0.314 V/µs, so the amplifier is not slew-limited at that frequency.

Traps

Applying the virtual-short rule when no negative feedback exists (comparator circuits); ignoring gain–bandwidth product at high closed-loop gain; confusing an encoder with a priority encoder; and reading a counter's modulus as its bit count.