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GATE EE: Digital Electronics

GATE EE · Work through your exam, one topic at a time.

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Digital Electronics

Digital Electronics covers number systems, Boolean minimisation, combinational blocks, sequential circuits, data converters, and logic families. It is one of the most reliably scoring domains because the answer can be verified.

Combinational logic

  • K-map groups are powers of two; don't-cares enlarge groups and may be used or ignored freely.
  • A multiplexer with n select lines implements any function of n+1 variables: put the residual variable on the data inputs.

Sequential logic

  • Derive next-state equations from the flip-flop excitation table; a mod-N counter resets when the count reaches N.
  • Setup and hold times bound the clock period: T ≥ t_pd + t_setup + t_skew.

Worked example: minimise F(A,B,C) = Σm(0,1,2,3,5,7). Minterms 0–3 all have A = 0, giving the term A′. Minterms 5 (101) and 7 (111) share A = 1 and C = 1, giving AC. So F = A′ + AC, which by absorption X + X′Y = X + Y simplifies to F = A′ + C. Check m6 (110): A′ = 0 and C = 0, so F = 0, correctly excluded from the minterm list.

Traps that cost marks

  • Ignoring static-1 hazards; add the consensus term to remove them.
  • Ripple counters accumulate propagation delay, so intermediate states can glitch a decoder.
  • ADC resolution: 1 LSB = V_FS/(2ⁿ − 1) for a unipolar n-bit converter.