Two-out-of-Three Interlock That Energizes With One Input
A trainee wires a two-out-of-three interlock for a small press using 74LS08 AND gates and a 74LS32 OR gate, implementing Y = AB + BC + AC. Inputs A, B and C come from three normally open limit switches pulled up by 4.7 kΩ resistors; a closed switch gives logic 0 and an open switch gives logic 1. The press may run only when at least two switches are closed, so the trainee adds an inverter to turn the sensor states into at least two closed. On test, with only A closed (A = 1 after inversion, B = C = 0), the relay energizes, which should be impossible. At the first AND gate, pin 1 measures 0 V, pin 2 measures 0 V, and pin 3 measures 3.4 V. The trainee has spare 74LS08, 74LS32 and 74LS00 ICs, 1 kΩ resistors, and a DMM. The machine is due for a safety check, and the supervisor wants the fault explained before any part is replaced.
1. Write the truth table and Boolean expression for the majority function and state whether the observed relay operation is valid.
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Majority function: Y = AB + BC + AC.
Truth table: 000 → 0 001 → 0 010 → 0 011 → 1 100 → 0 101 → 1 110 → 1 111 → 1
With only A closed, after inversion A = 1 and B = C = 0, so the correct output is 0. The relay energizing is therefore a fault, not a valid majority result. The trainee should verify that the circuit really implements AB + BC + AC, that the inverter is applied correctly, and that the relay driver is not being pulled high by a wiring error or a floating input.
2. Interpret the measurement at the first AND gate and list plausible causes and next steps before replacing the IC.
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On a 74LS08, pins 1 and 2 are inputs and pin 3 is the output of gate 1. With both inputs at 0 V, a good gate must output low, typically 0.2–0.4 V. A steady 3.4 V is not a valid AND output for 0,0.
Plausible causes: the device is not actually a 74LS08; the meter ground is not at the IC ground; pin 3 is shorted to Vcc or to another high output; the probe is on the wrong pin; or one input is floating and the DMM is loading it to a misleading 0 V. A floating LS TTL input normally sits high, so a 1 kΩ pull-down test is useful.
Next steps: confirm supply pin 14 = 5 V and ground pin 7 = 0 V, confirm the pinout, check for solder bridges between pin 3 and Vcc or adjacent outputs, and add pull-downs to unused inputs. Replace the IC only after these checks; if it still outputs high with confirmed 0 V inputs, replace it and test the replacement.
3. Recommend how the interlock should be made fail-safe for a press, rather than relying on this gate circuit alone.
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Do not rely on a single logic gate as the safety function. Use a safety relay or contactor with force-guided contacts, normally closed fail-safe wiring, dual-channel monitoring, and a manual reset. Add pull-down resistors to all unused inputs, debounce the switches, and arrange the circuit so a stuck-high output cannot energize the press.
The majority logic is a process vote, not a guarantee against a stuck sensor or a shorted gate. Add sensor discrepancy checking and a periodic proof test. The repair must be inspected and signed off against the machine's safety check before production. If the fault cannot be explained, lock off the press rather than replacing parts and returning it to service.