WBCHSE HS Modern Computer Application study materials
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The Weather Cube: Invalid BCD States and Two's Complement Displays

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The Weather Cube: Invalid BCD States and Two's Complement Displays

The 'Digital Weather Cube' built by a Class XII team for the district science fair has two independent displays. The visitor counter uses a 4-bit BCD decade counter driving a seven-segment display; after the 999th visitor is counted, the next pulse produces the bit pattern 1010 at the counter output and the display shows a meaningless symbol until the team presses the manual reset. The temperature section stores the sensor reading in an 8-bit register using two's complement. On a cold morning the sensor sends −13, and the LCD, which is wired to treat the register as an unsigned binary number, shows 243 instead. A visiting judge also notes that when the team demonstrates 127 + 1 on the 8-bit adder, the result lamp shows a negative value, and the carry lamp lights. The team must explain these three behaviours to the judge without changing the hardware.

1. Explain why the visitor counter displays a meaningless symbol at the tenth pulse, and state the minimum number of flip-flops a decade counter needs. Why is the count not simply allowed to run to 1111?

Read the worked answer

A 4-bit counter has 16 possible states, but BCD uses only 0000–1001, i.e. the digits 0–9. The pattern 1010 is the tenth state and is not a valid BCD digit, so the seven-segment decoder drives segments that correspond to no digit. The counter is not faulty; it is a mod-16 counter being used as a mod-10 counter with no feedback path.

Number of flip-flops: three flip-flops give only 2³ = 8 states, which cannot hold ten counts, so four flip-flops is the minimum.

The fix is to decode state 1010 and use that signal to clear all four flip-flops to 0000 - asynchronously for a quick fix, or synchronously (clear enabled when the next state would be 1010) to avoid a glitch on the clear line. The effective modulus then becomes 10.

Allowing the counter to run to 1111 would waste six states (1010–1111) and, more importantly, would make the display show six invalid symbols per cycle, so the readout would be wrong six times in every sixteen visitors. The wasted states are the price of reusing a binary counter for a decimal display.

2. The sensor sends −13 but the LCD shows 243. Show the 8-bit two's complement form of −13, verify the 243 by unsigned interpretation, and state what the LCD firmware must check before displaying.

Read the worked answer

Step 1 - magnitude: +13 = 0000 1101. Step 2 - invert all bits: 1111 0010. Step 3 - add 1: 1111 0011.

So −13 is stored as 1111 0011.

Check as signed: −128 + 64 + 32 + 16 + 0 + 0 + 2 + 1 = −13.

Read as unsigned: 128 + 64 + 32 + 16 + 2 + 1 = 243. This is not a coincidence - in 8-bit arithmetic 243 = 256 − 13, the wrap-around that two's complement relies on. The register content is identical; only the interpretation differs, which is exactly why the LCD shows 243.

The firmware must test the sign bit (bit 7). If it is 0 the value is positive and can be printed directly; if it is 1 the value is negative, so the firmware should subtract 256 (or take the two's complement of the low seven bits) and print the result with a minus sign. Simply declaring the register as signed char in C and printing with %d does this automatically.

3. For 0111 1111 + 0000 0001 = 1000 0000 with the carry lamp lit: is this an overflow? Justify using the carry into and out of the sign bit, and say whether the carry lamp can be trusted as an overflow indicator here.

Read the worked answer

Adding 1 to bit 0 propagates a carry right through bits 1–6, so there is a carry into bit 7, but the sum of bit 7 (0 + 0 + carry 1) produces no carry out of bit 7. The carry-out of the whole 8-bit adder is therefore 0.

Overflow in signed addition is the XOR of those two carries: 1 ⊕ 0 = 1, so this is an overflow. Equivalently, +127 + 1 = +128, which lies outside the 8-bit two's complement range (−128 to +127); the pattern 1000 0000 actually means −128. The result lamp is therefore 'negative' when the true answer should be positive.

That makes the lit carry lamp misleading. Since the carry-out of bit 7 is 0 here, the lamp must be showing an internal carry from bit 6. For unsigned arithmetic a carry-out does indicate overflow, but for signed arithmetic it does not, so the lamp cannot be used as an overflow flag. The correct detector is an XOR gate fed by the carry into and the carry out of the sign bit, or the simpler rule: overflow occurs when both operands have the same sign and the result has the opposite sign.