Semiconductor Devices and Rectifiers
What the exam tests
This domain checks junction-diode behaviour, Zener regulation, and the four common rectifier circuits. You must calculate DC output, ripple, PIV and diode current, and explain why a bridge avoids a centre-tapped transformer.
Core rules
- Intrinsic silicon has equal electrons and holes; doping with pentavalent donors gives n-type, trivalent acceptors give p-type. Majority carriers dominate conduction.
- PN junction: forward bias reduces the barrier, current rises exponentially above about 0.7 V for silicon (0.3 V germanium). Reverse bias widens the depletion layer; only leakage flows until breakdown.
- Half-wave rectifier: one diode, output frequency equals supply, ripple factor 1.21, PIV=Vm.
- Full-wave centre-tap: two diodes, output 2f, ripple 0.48, PIV=2Vm.
- Bridge: four diodes, output 2f, ripple 0.48, PIV=Vm (one diode drop in each path).
- Capacitor filter reduces ripple; ripple ≈ I/(fC) for full-wave.
Worked example
A bridge rectifier is fed from a 12 V rms secondary. Vm=12×1.414=17.0 V. With no filter and ideal diodes, Vdc=2Vm/π=10.8 V. Each diode must withstand PIV=Vm=17.0 V, so a 1N4007 (1000 V) is safe. With a 1000 µF filter and 100 mA load at 50 Hz, ripple ≈ I/(2fC)=0.1/(2×50×0.001)=1.0 V peak-to-peak.
Traps
Using 2Vm for bridge PIV; forgetting two diode drops in a bridge; and treating the 12 V transformer rating as peak rather than rms. A 12 V rms secondary gives about 17 V peak before loading, not 12 V.