Transistors and Amplifier Circuits
What the exam tests
Transistors and Amplifier Circuits tests BJT operating regions, current gain, biasing stability, and small-signal amplifier behaviour. Numerical work usually involves finding Ib, Ic, VCE, α, β or the voltage gain of a common-emitter stage.
Core rules
- NPN: current enters base and collector, leaves emitter; PNP reverses. In active mode the base-emitter junction is forward biased and base-collector reverse biased.
- Ic=βIb, Ie=Ic+Ib, α=Ic/Ie=β/(β+1). β typically 50-300 and varies with temperature and current.
- Regions: cutoff (Ib=0, VCE≈VCC), saturation (VCE≈0.2 V), active (amplifier). A switch is driven between cutoff and saturation.
- CE amplifier: input at base, output at collector, 180° phase inversion, voltage gain Av=-Rc/(re+Re) with emitter bypass; without bypass, Av≈-Rc/Re.
- Voltage-divider bias is preferred because the base voltage is set by resistors, making Ic almost independent of β.
Worked example
An NPN has β=100, VCC=12 V, Rc=2.2 kΩ, and base current 20 µA. Ic=100×20 µA=2 mA. Ie=2.02 mA, so α=2/2.02=0.990. The collector voltage is VCC-IcRc=12-0.002×2200=7.6 V. Since VCE≈7.6 V, the device is in active mode, not saturation. If Rc were 5.6 kΩ, the ideal drop would be 11.2 V, leaving VCE=0.8 V-close to saturation, so the simple gain model would fail.
Traps
Assuming Ic=βIb in saturation; ignoring VBE≈0.7 V in bias calculations; and confusing α with β. Also remember that a CE stage inverts: a positive-going input gives a negative-going output.