Digital Electronics and Logic Gates
What the exam tests
Digital Electronics and Logic Gates tests number-system conversion, truth tables, Boolean simplification, gate implementation and simple sequential circuits. You should be able to go from a word problem to a truth table, then to a minimised expression and a NAND-only circuit.
Core rules
- Binary weights are 8-4-2-1; hexadecimal groups four bits. BCD uses only 0000-1001 per decimal digit.
- AND outputs 1 only when all inputs are 1; OR when any input is 1; XOR when inputs differ; NAND and NOR are inverted AND/OR.
- De Morgan: (A·B)'=A'+B' and (A+B)'=A'·B'. NAND and NOR are universal gates.
- Combinational circuits (adders, multiplexers, decoders) have no memory; sequential circuits (flip-flops, registers, counters) do.
- A D flip-flop copies D to Q on the clock edge; a JK flip-flop toggles when J=K=1.
Worked example
Simplify Y=A'B+AB+AB'. Group the first two terms: A'B+AB=B(A'+A)=B. Then Y=B+AB'. By absorption, B+AB'=B+A. Check with A=0, B=0: original 0; A+B=0. A=1, B=0: original 0+0+1=1; A+B=1. A=0, B=1: 1+0+0=1. A=1, B=1: 0+1+0=1. The minimised form is Y=A+B, implementable with one OR gate or three NAND gates.
Traps
Reading active-low signals as if they were active-high; forgetting that a NAND with tied inputs is an inverter; and confusing XOR with OR. In binary subtraction, borrow propagates leftward, so 1000₂-0001₂=0111₂, not 1001₂.