Data Representation, Arithmetic, and Digital Logic
Data Representation, Arithmetic, and Digital Logic tests whether you can move between bit patterns, numeric values, and logic circuits without losing sign, range, or precision. Questions often combine two's complement arithmetic, IEEE 754, and Boolean simplification.
Core rules
Unsigned n-bit integers range from 0 to 2^n − 1. Two's complement represents −2^(n−1) to 2^(n−1) − 1; negation is invert all bits and add one. Sign extension copies the sign bit. IEEE 754 single precision uses 1 sign bit, 8 exponent bits with bias 127, and 23 fraction bits, with an implicit leading 1 for normal values. Boolean algebra uses identities such as De Morgan's laws; combinational logic has no state, while sequential logic depends on clocks and setup/hold timing.
Worked example
Represent −5 in 8-bit two's complement. +5 is 00000101; invert to 11111010; add 1 to get 11111011. Add +7 (00000111): 11111011 + 00000111 = 1 00000010. Discard the carry out and the result is 00000010 = +2. The operands have opposite signs, so signed overflow cannot occur.
Traps
Sign-extending 11111011 to 16 bits gives 1111111111111011, not 0000000011111011. In IEEE 754, do not forget the bias and implicit bit. Overflow occurs when same-sign operands produce a different-sign result; carry out alone is not signed overflow. Do not confuse XOR with OR when simplifying logic.