Computer Systems
The Computer Systems domain tests how data is represented inside a machine, how the processor executes instructions, and how memory and I/O devices are organised. MATSEC questions here are usually precise: a register name, a bit pattern, a truth-table row.
Architecture and the instruction cycle
The stored-program (von Neumann) model keeps instructions and data in the same memory. The CPU contains the ALU, the control unit and registers. The program counter (PC) holds the address of the next instruction; the memory address register (MAR) carries an address to memory; the memory data register (MDR) buffers the value transferred; the current instruction register (CIR) holds the instruction being decoded. Buses are separate: address (one-way, width fixes addressable memory), data (bidirectional, width fixes word size) and control.
Data representation
Integers use fixed-width two's complement so that subtraction becomes addition. With n bits the range is -2^(n-1) to 2^(n-1)-1. Hexadecimal is shorthand for 4-bit groups, used because it is compact and maps exactly to binary.
Worked example
Represent -5 in 8-bit two's complement, then add 3.
+5 = 0000 0101. Invert: 1111 1010. Add 1: 1111 1011. Add 3 (0000 0011): 1111 1110. The leading bit is 1, so the value is negative; invert and add 1 gives 0000 0010 = 2, so the result is -2. The carry out of the sign bit is discarded, which is correct for an in-range result.
Traps
- Assuming the 8-bit signed range is -127 to 127 instead of -128 to 127.
- Swapping the roles of MAR and MDR.
- Treating cache as software-managed rather than hardware-managed.
- Writing decimal 10 as 1010 in hexadecimal.