Computer Systems
Domain scope
This domain examines the stored-program computer: CPU operation, memory hierarchy, data representation and digital logic. STPM 958 questions often ask you to trace the fetch-decode-execute cycle, convert number bases, represent signed integers and complete truth tables.
Core rules
- Von Neumann architecture: instructions and data share memory; the CPU fetches an instruction, decodes it, executes it and stores results.
- Memory hierarchy from fastest, smallest and costliest per byte to slower, larger and cheaper: registers, cache, RAM, secondary storage.
- In an n-bit two's complement system, the range is −2^(n−1) to 2^(n−1)−1. The most significant bit has negative place value.
- Logic gates: AND outputs 1 only if all inputs are 1; OR outputs 1 if any input is 1; XOR outputs 1 if inputs differ; NOT inverts.
Worked example
Represent −5 in 8-bit two's complement. Reasoning: write +5 as 0000 0101. Invert the bits to get 1111 1010. Add 1 to get 1111 1011. Check: the MSB is 1, so the value is −128 + 64 + 32 + 16 + 8 + 2 + 1 = −5. Range check: −5 lies between −128 and 127, so 8 bits is sufficient.
Traps
- Forgetting the +1 after inversion.
- Confusing sign-magnitude with two's complement; 1000 0101 is not −5 in two's complement.
- Saying cache is larger than RAM; cache is smaller and faster.
- Mixing up KiB (1024 bytes) and kB (1000 bytes).