Bias Divider Versus Emitter Degeneration in a Wide-hFE Production Run
A common-emitter stage is to be built with NPN devices from three suppliers quoting hFE(min) = 50, 100 and 200 at IC ≈ 2 mA. The design has VCC = 12 V, RC = 2.2 kΩ, RE = 470 Ω, a base divider of 47 kΩ to VCC and 10 kΩ to ground, and VBE is taken as 0.70 V. A colleague argues the divider is 'far too soft' - its current is only about four times the worst-case base current - and proposes dropping RE to 100 Ω to recover headroom. Production must hold quiescent collector current within ±20 % of the nominal design across the whole hFE spread and from 0 to 70 °C, and the stage must later deliver 20 V/V of gain at 1 kHz.
1. Compute IC and VCE at hFE = 50, 100 and 200 for the proposed 470 Ω design. Does it meet the ±20 % requirement?
Read the worked answer
Thevenin of the divider: VBB = 12 × 10/57 = 2.105 V, RB = 47k‖10k = 8.246 kΩ. Then IB = (VBB − VBE)/(RB + (hFE+1)RE) and IC = hFE·IB.
| hFE | IB | IC | IE | VE | VCE |
|---|---|---|---|---|---|
| 50 | 43.6 µA | 2.18 mA | 2.22 mA | 1.05 V | 6.16 V |
| 100 | 25.2 µA | 2.52 mA | 2.55 mA | 1.20 V | 5.25 V |
| 200 | 13.7 µA | 2.74 mA | 2.75 mA | 1.29 V | 4.69 V |
(Check at hFE = 100: IB = (2.105−0.700)/(8246 + 101×470) = 1.405/55 716 = 25.2 µA.)
Against the nominal 2.52 mA, ±20 % is 2.02–3.02 mA. The spread 2.18–2.74 mA sits inside it with room to spare, and all three devices stay well clear of saturation (VCE ≥ 4.7 V). The colleague's 'soft divider' objection is answered by the emitter resistor: RE degenerates the bias so the divider does not have to be stiff. The rule of thumb (divider current ≥ 10 × IB,max) is a shortcut for circuits without RE, not a law.
2. Evaluate the proposal to cut RE to 100 Ω. Show the numbers behind your verdict.
Read the worked answer
Repeat the calculation with RE = 100 Ω:
- hFE = 50: IB = 1.405/(8246 + 51×100) = 1.405/13 346 = 105 µA → IC = 5.27 mA; VE = 0.53 V; VCE = 12 − 5.27(2.2) − 0.53 = −0.06 V - the device is in saturation, not in the active region.
- hFE = 200: IB = 1.405/(8246 + 201×100) = 1.405/28 346 = 49.6 µA → IC = 9.92 mA; VE = 1.00 V; VCE = 12 − 21.8 − 1.0 < 0 - deeply saturated.
The collector current would run from 5.3 mA to nearly 10 mA, roughly 2:1, and two of the three parts would not even be linear. The proposal fails on both counts it was meant to fix: it destroys the ±20 % bias target and it removes the headroom it claimed to create.
General lesson: RE is what converts an hFE-sensitive current source into an hFE-insensitive one. If more headroom is genuinely needed, reduce RC or raise VCC, not RE.
3. Quantify the temperature drift of the 470 Ω design and explain how the 20 V/V, 1 kHz gain would actually be set.
Read the worked answer
Drift. dIC/dVBE ≈ 1/(RE + RB/(hFE+1)). At hFE = 100 that is 1/(470 + 81.6) = 1.81 mA/V. With VBE falling ≈ 2 mV/°C, the collector current rises ≈ 3.6 µA/°C, i.e. ≈ 0.14 %/°C. Over a 25 → 70 °C excursion (45 °C) that is +6.5 % (about +0.16 mA), plus a smaller contribution from rising hFE at high temperature. Worst case stacks on the hFE spread: 2.74 mA × 1.065 ≈ 2.92 mA, still inside the 3.02 mA ceiling but with little margin - worth verifying on the first article rather than assuming.
Gain. With RE fully bypassed, |Av| = gm·RC, gm = 2.52 mA/25.85 mV = 0.0976 S, giving ≈ 215 V/V - far too high, and badly distorted at any real output swing. Set the gain with unbypassed degeneration instead: Av ≈ RC/RE1 = 20 requires RE1 = 2200/20 = 110 Ω, leaving 470 − 110 = 360 Ω to bypass. Size the bypass capacitor so its reactance is small against 110 Ω at 1 kHz: XC ≤ 11 Ω → C ≥ 1/(2π·1000·11) = 14.5 µF, so 22 µF (or 47 µF for margin at the low end of the band). Gain then depends on the ratio of two resistors, not on hFE or gm, which is exactly why the 20 V/V target can be held over production.