Part-66 Module 5 study materials
Part-66 Module 5 study resources

Part-66 Module 5 study plan

Part-66 Module 5 · Give each week a clear focus.

8 weeks · About 7 hours per week

Week 1

Typical Electronic/Digital Aircraft Systems & Basic Computer Structure and Microprocessors

  • Label the major LRUs of a typical digital avionics architecture (FMS, autopilot/flight director, EFIS symbol generator, ADC, IRU/AHRS, display units) and list the data each one exchanges

  • Trace the signal path from an air-data or inertial sensor through to a displayed parameter, naming every processing stage on the way

  • Distinguish the roles of CPU, ALU, control unit, registers, ROM, RAM, cache and the address/data/control buses inside a microprocessor

  • Explain the fetch-decode-execute cycle, then describe how interrupts and the main addressing modes (direct, indirect, indexed) change what the CPU does

  • Draw a block diagram of a typical electronic/digital aircraft system showing LRU-to-LRU data flow and the bus type used on each link

Your checkpoint

One-page hand-drawn block diagram of a digital avionics architecture with every LRU, bus and data type annotated, plus 30 self-written recall questions answered closed-book.

Week 2

Electronic Displays & Numbering Systems and Data Conversion

  • Convert values freely between binary, octal, decimal, hexadecimal and BCD without a calculator

  • Convert numbers between sign-magnitude, ones-complement and twos-complement form, and perform binary addition and subtraction in twos complement, checking each answer in decimal

  • Describe the operating principles of CRT, LCD (TN, IPS), LED and OLED displays and compare them on brightness, contrast, viewing angle, power and service life

  • Explain passive-matrix versus active-matrix (TFT) addressing and state why active matrix is used in cockpit displays

  • Identify the display technologies used in EFIS and EICAS/ECAM units and state the typical indications of a degrading display

Your checkpoint

A 40-question self-test on number systems and displays scored at 85% or better, plus a five-row comparison table of display technologies with at least six parameters per row.

Week 3

Data Buses & Logic Circuits

  • Draw an ARINC 429 word bit-by-bit and describe the function of label, SDI, data field, SSM and parity

  • Calculate ARINC 429 word timing and bit rate for high- and low-speed operation, and identify the direction of transmission on a single-source bus

  • Compare ARINC 429, ARINC 629, MIL-STD-1553B and CAN on topology, bit rate, directionality and typical aircraft application

  • Construct truth tables for AND, OR, NOT, NAND, NOR and XOR gates and derive a Boolean expression from any given truth table

  • Minimise Boolean expressions with Karnaugh maps and re-implement the result using only NAND or only NOR gates

  • Analyse SR, D and J-K flip-flops, counters and shift registers by drawing timing diagrams from a given input waveform

Your checkpoint

Worked solutions to 25 logic problems (10 truth-table-to-circuit, 10 Karnaugh minimisations, 5 sequential timing diagrams) plus a fully labelled ARINC 429 word diagram.

Week 4

Electronic Instrument Systems & Fibre Optics

  • Explain the purpose and operation of EFIS, EICAS/ECAM, FMS, autopilot/flight director, ADC, AHRS/IRU, radio altimeter, GPWS and TCAS

  • Describe how each system's sensor data is conditioned, digitised and presented, and state its typical failure or degradation indications

  • Explain total internal reflection and calculate critical angle, numerical aperture and acceptance angle for a given fibre

  • Compare step-index, graded-index and single-mode fibre on core diameter, bandwidth, attenuation and aircraft use

  • Describe fibre-optic connectors, splices, LED versus laser sources and PIN photodiode detectors, and list the handling and contamination precautions

Your checkpoint

A closed-book half-length mock of 30 questions on Domains 1 and 8 scored at 75% or better, with a written correction note for every wrong answer.

Week 5

Electrostatic Sensitive Devices and Software Management Control & Integrated Circuits

  • Identify ESD-sensitive device classes and describe the human body, machine and charged-device damage models

  • Describe a protected ESD workstation and list the checks (wrist strap test, bench and floor grounding, packaging, labelling, ionisation) performed before handling a line-replaceable module

  • Explain software management control: configuration control, part-number and version control, loadable software handling and documentation traceability

  • Distinguish ESD, over-voltage, thermal and handling damage in integrated circuits and state the typical failure signature of each

  • Describe IC packaging, levels of integration from SSI to VLSI, and the difference between linear and digital ICs, then outline board-level fault-finding on an IC-populated card

Your checkpoint

A shop-floor ESD handling procedure written as a single one-page checklist, plus a 20-question quiz on Domains 10 and 6 scored at 80% or better.

Week 6

Multiplexing & Electromagnetic Environment

  • Explain time-division and frequency-division multiplexing and state why multiplexing is used on aircraft

  • Draw a multiplexed aircraft data system at block level, marking the multiplex and de-multiplex points and where decoding occurs

  • Identify EMI sources (lightning, HIRF, RF transmitters, motors, static discharge, switching regulators) and classify each coupling path as conducted or radiated

  • Explain the purpose of shielding, bonding, grounding, twisted pairs and filtering in aircraft wiring, and describe a typical bonding resistance check

  • Describe how EMI manifests in a digital system and state the precautions to take when working near high-intensity radiated fields or transmitting antennas

Your checkpoint

A labelled diagram of a multiplexed data system showing mux/de-mux points, plus a two-column table of 10 EMI sources against their mitigations, recalled at 100% without notes.

Week 7

Basic Computer Structure and Microprocessors & Data Buses

  • Re-work weak topics flagged by the week-4 mock until each one is answered correctly three times in a row

  • Trace a parameter from an ARINC 429 label through the receiver, decoder and display driver, explaining each conversion

  • Explain memory hierarchy, stack operation and interrupt handling inside a flight management computer and relate them to the fetch-decode-execute cycle

  • Produce timing and data-flow diagrams for a 1553B or ARINC 629 exchange and compare them with a simple ARINC 429 transfer

  • Complete a full-length timed mock under exam conditions

Your checkpoint

One full-length timed mock across all domains, scored at 80% or better, with a remediation list of no more than five remaining weak topics.

Week 8

Typical Electronic/Digital Aircraft Systems & Electronic Displays

  • Answer scenario questions on EFIS/EICAS display failure, FMS degradation and sensor disagreement by naming the system, the likely fault and the reference to check

  • Consolidate all twelve domains into a single memory sheet of key numbers, standards and definitions

  • Re-drill every item on the week-7 remediation list until each is answered correctly twice in a row

  • Sit a second full-length timed mock and compare the domain-by-domain score against week 7

Your checkpoint

A second full-length mock scored at 85% or better, plus a one-page fact-and-formula sheet written entirely from memory.

Milestones

Week 2: Number systems and display self-test completed closed-book at 85% or better, with hex/binary/BCD conversions done without a calculator.

Week 4: Domains 12, 5, 9, 2, 3, 4, 1 and 8 each covered once; half-length mock on Domains 1 and 8 scored at 75% or better and all four week deliverables filed.

Week 6: All twelve domains have been studied at least once; ESD checklist written and the multiplexing/EMI recall table reproduced at 100% without notes.

Week 7: First full-length timed mock completed under exam conditions at 80% or better, with a remediation list of five topics or fewer.

Week 8: Second full-length mock at 85% or better with no single domain below 70%, and the memory sheet reproduced from scratch.