Huawei HCIE-AI cheat sheet

Supervised learning minimizes empirical risk: θ* = argmin (1/n) Σ L(f_θ(x_i), y_i) + λR(θ); the regularizer λR(θ) trades bias for variance.

Bias–variance decomposition: E[(y − f̂)²] = noise + bias² + variance; high bias underfits (both train and validation error high), high variance overfits (train error low, validation error high).

Precision = TP/(TP+FP), Recall = TP/(TP+FN), F1 = 2PR/(P+R); use PR-AUC for rare positives, ROC-AUC when class balance is roughly stable.

Confusion-matrix decision rule: choose the metric matching the cost asymmetry - recall when false negatives are costly (disease screening), precision when false positives are costly (spam blocking).

L1 (Lasso) drives coefficients to exactly zero and yields sparse feature selection; L2 (Ridge) shrinks smoothly; Elastic Net combines both with mixing parameter α.

Gradient boosting fits additive trees sequentially on the negative gradient (residual); random forest averages decorrelated trees via bootstrap sampling plus random feature subsets, reducing variance.

Cross-validation: k-fold estimates generalization by training k times on (k−1)/k of data; stratified k-fold preserves class proportions; never tune on the test split.

Data leakage occurs when information from the target or future leaks into features (e.g., scaling before splitting, target-encoded columns); it inflates validation scores that collapse in production.

Class imbalance remedies: resampling, class weights, threshold tuning, and cost-sensitive loss; report per-class metrics rather than overall accuracy.

Backpropagation applies the chain rule to compute ∂L/∂W layer by layer; vanishing gradients arise when repeated Jacobians have spectral norm < 1, mitigated by ReLU, residual connections, and normalization.

ReLU(z)=max(0,z) has a constant gradient of 1 for positive inputs; GELU and Swish are smooth alternatives used in Transformer feed-forward blocks.

Batch normalization normalizes per channel across the batch dimension; LayerNorm normalizes per sample across features - LayerNorm is standard in Transformers because it is batch-size independent.

Self-attention: Attention(Q,K,V)=softmax(QKᵀ/√d_k)V; the √d_k scaling keeps logits from saturating softmax; multi-head attention concatenates parallel heads then projects.

Transformer block = multi-head self-attention + position-wise FFN, each wrapped with residual connection and LayerNorm (pre-LN is more stable for deep stacks).

CNN inductive biases: local receptive fields and weight sharing give translation equivariance; pooling reduces spatial resolution; depthwise separable convolutions cut FLOPs for mobile deployment.

ResNet identity shortcut y = F(x) + x lets gradients flow directly, enabling networks with 100+ layers; DenseNet concatenates instead of adding.

Recurrent networks process sequences with a shared hidden state; LSTM/GRU gating mitigates vanishing gradients, but Transformers now dominate long-context sequence modeling.

Mixed precision (FP16/BF16 compute with FP32 master weights) plus loss scaling speeds training and reduces memory; BF16 has wider dynamic range than FP16, reducing overflow risk.

Ascend chips use a Da Vinci architecture with separate Cube (matrix), Vector, and Scalar units; Cube units accelerate 16×16 matrix multiply-accumulate for deep learning.

CANN (Compute Architecture for Neural Networks) is the heterogeneous computing software stack between frameworks (MindSpore, PyTorch via adapter) and Ascend hardware, including graph compiler, runtime, and operator libraries.

GE (Graph Engine) performs graph optimization and partitioning, then offloads subgraphs to the Ascend device; the runtime schedules tasks on the device streams.

TBE (Tensor Boost Engine) is the operator development framework for Ascend, using DSL or TIK to write custom operators compiled to device code.

AICPU operators run on the host-side CPU cores of the Ascend device for control-heavy or unsupported ops; AI Core handles dense tensor compute.

HCCL (Huawei Collective Communication Library) provides all-reduce, all-gather, and broadcast for distributed training across Ascend devices, analogous to NCCL on GPUs.

Model conversion: frameworks export to ONNX or MindIR, then ATC (Ascend Tensor Compiler) compiles to an .om offline model with fixed input shapes and target SoC version.

Ascend 910 is oriented to training and 310 to inference/edge; memory hierarchy includes on-chip buffers and HBM, so operator tiling and data reuse dominate performance.

Profiling via msprof/MindStudio identifies AI Core utilization, memory bandwidth, and pipeline stalls; low Cube utilization usually indicates tiling or shape-alignment problems.

Serving latency budget decomposes into preprocess, inference, and postprocess; batching raises throughput but increases per-request tail latency, so tune max batch size against SLO.

Quantization maps FP32 weights/activations to INT8 with scale and zero-point: q = round(x/scale) + zero_point; post-training quantization is fast, quantization-aware training preserves accuracy better.

Knowledge distillation trains a small student on softened teacher logits with temperature T: L = KL(softmax(z_t/T) ‖ softmax(z_s/T)); lower T at inference recovers sharp predictions.

Pruning removes low-magnitude weights or channels; structured (channel) pruning yields real speedups on hardware, unstructured sparsity needs sparse kernels to help.

ONNX provides a framework-neutral graph format; conversion pipelines typically go PyTorch → ONNX → target runtime (e.g., ATC → .om on Ascend).

Serving patterns: online real-time inference (low latency, small batches), offline batch scoring (high throughput), and streaming inference with stateful session management.

Model drift monitoring compares live feature and prediction distributions to training baselines (PSI, KL divergence); retraining triggers should be defined before deployment.

A/B and canary rollout: shadow traffic validates a new model without user impact; canary shifts a small percentage of traffic and rolls back on metric regression.

Containerized deployment with Kubernetes uses readiness/liveness probes and horizontal pod autoscaling on queue depth or GPU/NPU utilization rather than CPU alone.