IB Computer Science HL flashcards

32 cards. Read the term and the definition here. The deck at the top of this page is optional.

Direct changeover

Deployment where the old system is replaced by the new one in a single step. It is fast and avoids duplicate running costs but carries the highest risk if the new system fails.

Parallel running

Deployment where old and new systems run simultaneously for a period. Outputs can be compared and the old system is a fallback, but data entry doubles and costs rise.

Data migration

Transferring existing data into a new system, usually with reformatting and validation. Risks include truncation, loss of precision, orphan records, and duplicate entries.

Acceptance testing

Testing performed with the client using real data against agreed criteria to confirm the delivered system meets its requirements before it is formally accepted.

Fetch-execute cycle

The repeated process where the CPU loads an instruction from the address in the program counter, decodes it, executes the operation, and stores any result.

Address bus width

The number of parallel address lines determines how many distinct memory locations can be referenced; n lines allow 2^n addressable locations.

Two's complement

A signed binary representation where the most significant bit indicates sign. To negate, invert all bits and add one; range is -2^(n-1) to 2^(n-1)-1.

Cache locality

Temporal locality means recently used data is likely reused soon; spatial locality means nearby addresses are likely accessed. Both raise cache hit rates and effective speed.

Pipelining hazard

A condition preventing the next instruction from executing in the intended cycle. Data, control, and structural hazards are mitigated by forwarding, stalling, and branch prediction.

TCP versus UDP

TCP is connection-oriented with sequencing, acknowledgements, and retransmission. UDP is connectionless with no delivery guarantee, suited to streaming and simple queries.

Subnet mask function

A bit pattern that separates the network portion from the host portion of an IP address; host bits all zero give the network address, all one give the broadcast address.

DHCP

A protocol that automatically supplies IP address, subnet mask, default gateway, and DNS server settings to devices joining a network, avoiding manual configuration.

NAT

Network Address Translation rewrites private source addresses to a public address at a gateway, letting many internal hosts share one routable address.

TTL field

A packet header value decremented at each router and discarded at zero, preventing endless circulation; traceroute varies it to reveal the path.

Abstraction

Removing detail irrelevant to the current problem so the essential features can be modelled. It simplifies design and lets different implementations share one interface.

Binary search precondition

Binary search repeatedly halves a sorted collection, giving O(log n) comparisons. It requires the data to be ordered and supports efficient access to the middle element.

Merge sort complexity

A divide-and-conquer sort that splits the collection, sorts halves recursively, and merges them. It is O(n log n) and stable but needs O(n) extra space.

Recursion base case

A condition that stops recursive calls without further recursion. Every recursive algorithm needs one, plus progress toward it, or it overflows the call stack.

De Morgan's laws

Boolean identities stating that NOT (A AND B) equals (NOT A) OR (NOT B), and NOT (A OR B) equals (NOT A) AND (NOT B). They simplify logic expressions.

Stack LIFO

A last-in-first-out structure with push, pop, and peek at one end. Operations at the top are O(1); searching requires removing or traversing elements.

Queue FIFO

A first-in-first-out structure where enqueue adds at the rear and dequeue removes from the front. It models scheduling, buffering, and breadth-first traversal.

Linked list trade-off

Insertion or deletion at a known node is O(1) and memory grows dynamically, but indexed access is O(n) because nodes must be traversed sequentially.

BST in-order traversal

Visiting a binary search tree's left subtree, then node, then right subtree outputs keys in ascending order; search cost is O(log n) only when balanced.

Adjacency matrix

A V by V grid storing whether an edge exists between each vertex pair. Edge lookup is O(1) and memory is O(V^2), wasteful for sparse graphs.

Hash collision handling

When two keys map to one bucket, chaining stores a list per bucket and open addressing probes other slots. Load factor triggers resizing to keep operations near O(1).

Round robin scheduling

Each ready process receives a fixed time quantum in turn. It is fair and responsive for interactive systems, but many context switches reduce throughput.

Virtual memory

A technique mapping logical addresses to physical frames via page tables, letting programs exceed physical RAM; excessive page faults cause thrashing.

Deadlock conditions

Four simultaneous conditions: mutual exclusion, hold-and-wait, no preemption, and circular wait. Breaking any one prevents deadlock from occurring.

Closed-loop control

Control that measures output with a sensor, compares it to a set point, and adjusts the actuator using the error, improving accuracy and rejecting disturbances.

PID controller

A controller combining proportional response to current error, integral action removing steady-state offset, and derivative action damping overshoot, tuned by gain settings.

ADC aliasing

If an analogue signal is sampled below twice its highest frequency, the Nyquist rate, higher frequencies appear as false lower ones and cannot be recovered.

IA success criteria

Testable statements agreed with the client describing what the finished computational solution must do; they drive design, testing, and the final evaluation.