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CHSE Odisha Elective Computer Science study materials
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CHSE Odisha Elective Computer Science practice questions

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Question 1Computer Fundamentals and System Organisation

The binary number 11011010 is equivalent to which decimal value?

  1. 218 Correct answer.
  2. 234
  3. 202
  4. 210

Explanation

Each bit position corresponds to a power of two, starting with 2^0 at the rightmost bit. Adding the place values of the set bits gives 128 + 64 + 16 + 8 + 2 = 218.

Question 2Computer Fundamentals and System Organisation

Which memory of a computer system holds its contents only while the power supply remains switched on?

  1. RAM Correct answer.
  2. ROM
  3. Flash memory
  4. Magnetic disk

Explanation

RAM is volatile: it stores programs and data only while power is supplied, and its contents are lost when the computer is switched off. ROM, flash memory and magnetic disks are non-volatile and retain their contents without power.

Question 3Computer Fundamentals and System Organisation

Which device is used to convert a printed page into a digital image that a computer can store and process?

  1. Joystick
  2. Plotter
  3. Light pen
  4. Scanner Correct answer.

Explanation

A scanner optically reads a printed page and converts the pattern of light and dark into a digital image. Plotters produce hard-copy output, while light pens and joysticks are pointing or control devices rather than page digitisers.

Question 4Computer Fundamentals and System Organisation

What is the 8-bit two's complement representation of the negative of the number 10110100?

  1. 01001011
  2. 01001100 Correct answer.
  3. 10110100
  4. 11001011

Explanation

To obtain the two's complement, invert every bit of 10110100 to get 01001011, then add 1 to the least significant bit, giving 01001100. This bit pattern represents the negative of the original value.

Question 5Computer Fundamentals and System Organisation

A two-input NAND gate produces an output of 0 for which combination of inputs?

  1. 0, 1
  2. 1, 0
  3. 0, 0
  4. 1, 1 Correct answer.

Explanation

A NAND gate is an AND gate followed by an inverter, so its output is 0 only when the AND output would be 1. This happens only when both inputs are 1; every other combination gives an output of 1.

Question 6Computer Fundamentals and System Organisation

Using the laws of Boolean algebra, the expression A + A'B simplifies to which of the following?

  1. A + B Correct answer.
  2. B
  3. A
  4. A' + B

Explanation

Applying the distributive law gives A + A'B = (A + A')(A + B). Since A + A' = 1, the expression reduces to A + B, so the term A'B is absorbed.

Question 7Computer Fundamentals and System Organisation

Which unit of the CPU fetches an instruction, decodes it and issues the control signals that coordinate the other parts of the computer?

  1. Accumulator register
  2. Control Unit Correct answer.
  3. Program counter
  4. Arithmetic Logic Unit

Explanation

The control unit directs the operation of the whole processor: it fetches each instruction, decodes it, and generates the timing and control signals needed by the other units. The ALU performs arithmetic and logic, while registers and the program counter only hold data or addresses.

Question 8Computer Fundamentals and System Organisation

What is the main purpose of installing cache memory between the CPU and main memory?

  1. Stores the operating system permanently
  2. Reduces average access time for data Correct answer.
  3. Increases the capacity of main memory
  4. Converts high-level code to machine code

Explanation

Cache is a small, fast memory that keeps recently or frequently used instructions and data close to the processor. Serving most references from cache lowers the average time needed to access data compared with going to main memory each time.

Question 9Computer Fundamentals and System Organisation

An instruction is written as LOAD 2500, where 2500 is the memory address from which the operand must be fetched. Which addressing mode does this illustrate?

  1. Indexed addressing
  2. Direct addressing Correct answer.
  3. Immediate addressing
  4. Register indirect addressing

Explanation

In direct addressing the address field of the instruction holds the effective address of the operand, so the CPU reads memory location 2500 to obtain the value. Immediate addressing would place the operand itself inside the instruction instead of an address.

Question 10Computer Fundamentals and System Organisation

A memory chip is organised as 4K × 8. How many address lines are needed to select one location within the chip?

  1. 12 Correct answer.
  2. 14
  3. 16
  4. 10

Explanation

The chip contains 4K = 4 × 1024 = 4096 = 2^12 addressable locations, so 12 address lines are required to select each location uniquely. The 8 in 4K × 8 gives the number of data bits per location, not the number of addresses.

Question 11Computer Fundamentals and System Organisation

The octal number 157 in base 8 is equivalent to which decimal value?

  1. 109
  2. 111 Correct answer.
  3. 175
  4. 127

Explanation

In base 8 the place values from left to right are 64, 8 and 1. Therefore 157₈ equals 1×64 + 5×8 + 7×1 = 64 + 40 + 7 = 111. The other choices come from incorrect place-value weights or from treating the octal digits as decimal digits.

Question 12Computer Fundamentals and System Organisation

In the von Neumann CPU, which register holds the address of the next instruction to be fetched from memory?

  1. Instruction register
  2. Program counter Correct answer.
  3. Accumulator
  4. Memory address register

Explanation

The program counter stores the address of the next instruction to be fetched, and it is updated after each fetch so that execution proceeds through the program. The instruction register instead holds the instruction currently being decoded, while the memory address register holds an address currently placed on the address bus.

Question 13Computer Fundamentals and System Organisation

Which type of read-only memory can be erased by exposing the chip to ultraviolet light and then reprogrammed?

  1. DRAM
  2. Cache memory
  3. EPROM Correct answer.
  4. SRAM

Explanation

An EPROM is programmed electrically but erased by exposing a quartz window on the chip to ultraviolet light, after which it can be programmed again. DRAM and SRAM are read-write memories, and cache memory is a fast read-write memory used by the CPU.

Question 14Computer Fundamentals and System Organisation

A 4-bit ripple counter is cleared to 0000 and then receives 11 clock pulses. What is its binary state after the eleventh pulse?

  1. 1011 Correct answer.
  2. 1010
  3. 1001
  4. 1100

Explanation

A 4-bit counter counts modulo 16, so after 11 pulses its state is the binary representation of decimal 11. Decimal 11 equals 8 + 2 + 1, which is 1011 in binary.

Question 15Computer Fundamentals and System Organisation

An 8-bit register contains 10010110. After one arithmetic right shift, what does the register contain?

  1. 01001011
  2. 11001011 Correct answer.
  3. 11001010
  4. 01001010

Explanation

An arithmetic right shift moves every bit one position right and copies the original sign bit into the vacated leftmost position. The original leftmost bit is 1, so the result begins with 1 and becomes 11001011. A logical right shift would instead insert 0 in the leftmost position.

Question 16Computer Fundamentals and System Organisation

In which addressing mode does the instruction contain the operand value itself rather than the address of the operand?

  1. Register indirect addressing
  2. Indirect addressing
  3. Immediate addressing Correct answer.
  4. Direct addressing

Explanation

In immediate addressing the operand is encoded directly in the instruction, so no additional memory reference is needed to obtain its value. Direct addressing gives the operand's memory address, while indirect and register indirect addressing give an address that must be dereferenced.

Question 17Computer Fundamentals and System Organisation

A cache has a hit ratio of 0.9. A cache access takes 10 ns and a main-memory access takes 100 ns. Using the model in which a miss costs one cache access plus one main-memory access, what is the average access time?

  1. 19 ns
  2. 20 ns Correct answer.
  3. 10 ns
  4. 100 ns

Explanation

For a hit the time is 10 ns, and for a miss the time is 10 ns for the cache probe plus 100 ns for main memory, or 110 ns. The average is 0.9×10 + 0.1×110 = 9 + 11 = 20 ns.

Question 18Computer Fundamentals and System Organisation

A 3-to-8 decoder has active-high outputs and input lines numbered with the most significant bit first. For input 101, which output line becomes active?

  1. 6
  2. 5 Correct answer.
  3. 3
  4. 4

Explanation

The input 101 is the binary representation of decimal 5, so the decoder activates output line 5 when outputs are numbered from 0 to 7. A 3-to-8 decoder activates exactly one output for each of the eight possible input combinations.

Question 19Computer Fundamentals and System Organisation

What is the main function of direct memory access in a computer system?

  1. Directly between main memory and an I/O device Correct answer.
  2. Between cache memory and the arithmetic logic unit
  3. Between two general-purpose registers inside the CPU
  4. Only between the CPU and an I/O device, one word at a time

Explanation

A DMA controller transfers blocks of data directly between main memory and an I/O device, allowing the CPU to continue other work instead of supervising every word. The CPU normally sets up the transfer and is interrupted when the block is complete.

Question 20Computer Fundamentals and System Organisation

A processor has a 5-stage pipeline with each stage taking 2 ns. For 100 independent instructions, what is the approximate speedup over a non-pipelined processor that also takes 5×2 ns per instruction?

  1. 4.81 Correct answer.
  2. 4.00
  3. 2.50
  4. 5.00

Explanation

Non-pipelined time is 100×5×2 = 1000 ns. Pipelined time is (5 + 99)×2 = 208 ns, so the speedup is about 1000/208 = 4.81. The ideal limit of 5 is not reached because of pipeline fill and drain time.

Question 21Computer Fundamentals and System Organisation

The hexadecimal number 3A is equivalent to which 8-bit binary value?

  1. 01010011
  2. 00110101
  3. 00111011
  4. 00111010 Correct answer.

Explanation

Each hexadecimal digit corresponds to four binary bits. The digit 3 is 0011 and A is 1010, so 3A becomes 00111010.

Question 22Computer Fundamentals and System Organisation

Which logic gate produces an output of 1 only when its two inputs are different?

  1. NAND gate
  2. XOR gate Correct answer.
  3. OR gate
  4. AND gate

Explanation

An XOR gate gives a 1 when exactly one input is 1 and the other is 0. When both inputs are equal, its output is 0.

Question 23Computer Fundamentals and System Organisation

In the CPU, which component performs arithmetic operations such as addition and logical operations such as AND?

  1. Instruction register
  2. ALU Correct answer.
  3. Control unit
  4. Program counter

Explanation

The Arithmetic Logic Unit executes arithmetic operations and logical operations on data. Other CPU registers and the control unit handle fetching, decoding and sequencing.

Question 24Computer Fundamentals and System Organisation

In signed magnitude representation, what decimal value does the 4-bit pattern 1011 represent?

  1. +3
  2. +11
  3. -5
  4. -3 Correct answer.

Explanation

In signed magnitude, the leftmost bit is the sign bit and the remaining bits give the magnitude. Here the sign is 1 for negative and 011 equals 3, so the value is -3.

Question 25Computer Fundamentals and System Organisation

Which Boolean theorem is expressed by the identity (A + B)' = A' · B'?

  1. Distributive law
  2. Absorption law
  3. Commutative law
  4. De Morgan's law Correct answer.

Explanation

De Morgan's laws show how a complemented sum or product can be rewritten with complemented variables. The identity (A + B)' = A' · B' is one of these two dual laws.

Question 26Computer Fundamentals and System Organisation

Which pair of Boolean expressions correctly represents the SUM and CARRY outputs of a half adder with inputs A and B?

  1. SUM = A ⊕ B, CARRY = A + B
  2. SUM = A ⊕ B, CARRY = A·B Correct answer.
  3. SUM = A·B, CARRY = A ⊕ B
  4. SUM = A + B, CARRY = A·B

Explanation

A half adder produces the sum by XOR because 1 + 1 must give sum 0 with a carry. The carry is 1 only when both inputs are 1, so it is the AND of A and B.

Question 27Computer Fundamentals and System Organisation

A JK flip-flop has J = 1 and K = 1. If its present state is 0, what is its next state?

  1. 0
  2. It is invalid
  3. It remains unchanged
  4. 1 Correct answer.

Explanation

When J and K are both 1, a JK flip-flop toggles on the active clock edge. Since the present state is 0, the next state becomes 1.

Question 28Computer Fundamentals and System Organisation

Which CPU register temporarily holds data fetched from main memory before it is placed on the internal bus?

  1. Memory address register
  2. Instruction register
  3. Program counter
  4. Memory data register Correct answer.

Explanation

The Memory Data Register temporarily holds data moving between memory and the processor. The Memory Address Register holds the address, while the PC and IR hold instruction-related information.

Question 29Computer Fundamentals and System Organisation

A direct-mapped cache has 64 lines and a block size of 16 bytes. To which cache line is main-memory block number 100 mapped?

  1. Line 4
  2. Line 36 Correct answer.
  3. Line 16
  4. Line 48

Explanation

For a direct-mapped cache, the line number equals the main-memory block number modulo the number of cache lines. Thus 100 modulo 64 gives line 36; the 16-byte block size does not affect this mapping.

Question 30Computer Fundamentals and System Organisation

A byte-addressable memory has 20 address lines. How many 4 KB pages can be addressed?

  1. 256 Correct answer.
  2. 128
  3. 512
  4. 64

Explanation

Twenty address lines allow 2^20 distinct byte addresses, which is 1 MB. Dividing this address space by the 4 KB page size, 2^12 bytes, gives 2^8 = 256 pages.

Question 31Number Systems, Boolean Algebra and Logic Gates

The decimal number 45 written in binary is:

  1. 101011
  2. 100111
  3. 110101
  4. 101101 Correct answer.

Explanation

Repeated division by 2 gives remainders 1, 0, 1, 1, 0, 1 read from the least significant bit upward, so the binary form is 101101. Checking the place values gives 32 + 8 + 4 + 1 = 45, which confirms the result.

Question 32Number Systems, Boolean Algebra and Logic Gates

The hexadecimal number 2A has the decimal value:

  1. 42 Correct answer.
  2. 26
  3. 52
  4. 210

Explanation

In hexadecimal the digit A stands for 10, and each position is a power of 16. Therefore 2A = 2 × 16¹ + 10 × 16⁰ = 32 + 10 = 42.

Question 33Number Systems, Boolean Algebra and Logic Gates

Which logic gate produces an output of 1 only when its two inputs are different from each other?

  1. NOR gate
  2. AND gate
  3. XNOR gate
  4. XOR gate Correct answer.

Explanation

The exclusive-OR gate outputs 1 for the input combinations 01 and 10 and 0 for 00 and 11, so it detects inequality between the inputs. Its Boolean expression is A'B + AB'.

Question 34Number Systems, Boolean Algebra and Logic Gates

The 8-bit two's complement representation of the decimal number −25 is:

  1. 11100110
  2. 00011001
  3. 11100111 Correct answer.
  4. 10011001

Explanation

First write +25 as 00011001, then invert every bit to get 11100110, and finally add 1 to obtain 11100111. The leading 1 confirms the number is negative.

Question 35Number Systems, Boolean Algebra and Logic Gates

According to De Morgan's theorem, the complement of the expression A · B is:

  1. A' + B' Correct answer.
  2. A + B
  3. A' · B'
  4. A' · B

Explanation

De Morgan's theorem states that the complement of a product equals the sum of the complements, so (A · B)' = A' + B'. The operation changes from AND to OR while each variable is inverted.

Question 36Number Systems, Boolean Algebra and Logic Gates

The Boolean expression A + A'B simplifies to:

  1. A' + B
  2. A + B Correct answer.
  3. B
  4. A · B

Explanation

Factor the expression as (A + A')(A + B) using the distributive law. Since A + A' = 1, the expression reduces to A + B. A quick check at A = 1, B = 0 gives 1 on both sides.

Question 37Number Systems, Boolean Algebra and Logic Gates

In a half adder circuit, the sum output is given by which expression?

  1. A · B
  2. A + B
  3. A ⊕ B Correct answer.
  4. (A · B)'

Explanation

A half adder adds two bits: the sum is 1 for inputs 01 and 10, and 0 for 00 and 11, which is exactly the exclusive-OR function. The carry output is the AND term A · B.

Question 38Number Systems, Boolean Algebra and Logic Gates

A three-variable Boolean function is defined by F(A, B, C) = Σm(1, 3, 5, 7). Its minimal expression is:

  1. BC
  2. AB
  3. A
  4. C Correct answer.

Explanation

Each listed minterm (001, 011, 101, 111) has C = 1, while A and B take every possible combination. A Karnaugh map therefore groups all four cells into one block of four that eliminates A and B, leaving F = C.

Question 39Number Systems, Boolean Algebra and Logic Gates

Applying the consensus theorem to AB + A'C + BC gives:

  1. A'C + BC
  2. AB + BC
  3. AB + A'C Correct answer.
  4. AB + AC

Explanation

The consensus term BC is redundant and can be deleted. Whenever B = 1 and C = 1, either A = 1 so that AB = 1, or A = 0 so that A'C = 1; the term BC never supplies a 1 that the other two terms do not already provide.

Question 40Number Systems, Boolean Algebra and Logic Gates

The two 8-bit two's complement numbers 01101001 and 01101101 are added. The 8-bit result and the overflow status are:

  1. 11010110, and overflow has occurred Correct answer.
  2. 01101101, and overflow has occurred
  3. 11010110, and no overflow has occurred
  4. 01110110, and overflow has occurred

Explanation

The operands are +105 and +109, whose true sum is +214, a value beyond the signed 8-bit maximum of +127. The bit pattern obtained is 11010110, which carries a sign bit of 1 and so represents a negative number, a contradiction that signals overflow. Overflow is detected when the carry into the sign bit differs from the carry out of it.

Question 41Number Systems, Boolean Algebra and Logic Gates

The octal number 47₈ has which decimal value?

  1. 41
  2. 56
  3. 39 Correct answer.
  4. 47

Explanation

In base 8, the digits have place values 8¹ and 8⁰, so 47₈ equals 4 × 8 + 7 × 1 = 39. The subscript 8 shows that the numeral is octal, not decimal. Therefore the decimal value is 39, not 47.

Question 42Number Systems, Boolean Algebra and Logic Gates

Which logic gate is described as a universal gate because any Boolean function can be built using only that gate type?

  1. XOR
  2. NAND Correct answer.
  3. AND
  4. OR

Explanation

A universal gate can implement NOT, AND and OR operations by itself, so any Boolean circuit can be constructed from it. NAND and NOR have this property. AND, OR and XOR alone cannot produce all three basic operations, so they are not universal.

Question 43Number Systems, Boolean Algebra and Logic Gates

In 8421 BCD, the decimal digit 8 is represented by which 4-bit code?

  1. 1010
  2. 1111
  3. 1000 Correct answer.
  4. 0111

Explanation

8421 BCD assigns the 4-bit binary equivalent of each decimal digit from 0 to 9. The decimal digit 8 is 1000 because 8 × 1 = 8. Codes 1010 through 1111 are not used for single decimal digits in 8421 BCD.

Question 44Number Systems, Boolean Algebra and Logic Gates

Using 1's complement arithmetic, what is the 4-bit result of 1010₂ − 0101₂?

  1. 0100
  2. 1010
  3. 1111
  4. 0101 Correct answer.

Explanation

The 1's complement of 0101 is 1010, so add 1010 + 1010 = 10100. The carry out of the 4-bit column is wrapped around and added to the least significant bit, giving 0100 + 1 = 0101. Since 1010₂ = 10 and 0101₂ = 5, the result 5 = 0101₂ is consistent.

Question 45Number Systems, Boolean Algebra and Logic Gates

The Boolean expression (A + B)(A + B') simplifies to which of the following?

  1. B
  2. 1
  3. A + B
  4. A Correct answer.

Explanation

Use the identity (X + Y)(X + Y') = X. Here X = A and Y = B, so the product becomes A + BB'. Since BB' = 0, the expression reduces to A.

Question 46Number Systems, Boolean Algebra and Logic Gates

The 4-bit binary number 1101 is converted to Gray code as:

  1. 1001
  2. 1101
  3. 1110
  4. 1011 Correct answer.

Explanation

Gray code bits are formed by keeping the most significant bit and XORing each adjacent pair of binary bits. For 1101: first bit 1; 1⊕1 = 0; 1⊕0 = 1; 0⊕1 = 1, giving 1011. Thus the Gray code is 1011.

Question 47Number Systems, Boolean Algebra and Logic Gates

For a full adder with inputs A, B and carry-in C_in, the carry-out expression is:

  1. AB + C_in
  2. A ⊕ B ⊕ C_in
  3. AB + C_in(A ⊕ B) Correct answer.
  4. A'B + AB'

Explanation

A full adder generates a carry when at least two of its three inputs are 1. This is expressed as AB + BC_in + AC_in, which can be factored as AB + C_in(A ⊕ B). The XOR term detects the case where exactly one of A or B is 1 and C_in supplies the second 1.

Question 48Number Systems, Boolean Algebra and Logic Gates

The canonical sum-of-products (SOP) expression for F(A, B) = A ⊕ B is:

  1. A'B + AB' Correct answer.
  2. AB
  3. A + B
  4. AB + A'B'

Explanation

XOR is 1 when the inputs differ, so the true minterms are A'B (A=0, B=1) and AB' (A=1, B=0). The canonical SOP is therefore A'B + AB'. The expression AB + A'B' is XNOR, not XOR.

Question 49Number Systems, Boolean Algebra and Logic Gates

Two signed 4-bit two's complement numbers, 1001 and 1011, are added. What are the 4-bit sum and the overflow flag?

  1. 10100 with overflow = 1
  2. 0100 with overflow = 0
  3. 0011 with overflow = 1
  4. 0100 with overflow = 1 Correct answer.

Explanation

In 4-bit two's complement, 1001 represents −7 and 1011 represents −5, whose true sum is −12. The 4-bit range is −8 to +7, so −12 cannot be represented and overflow occurs. Binary addition gives 10100; keeping four bits gives 0100, and the sign-invalid result confirms overflow = 1.

Question 50Number Systems, Boolean Algebra and Logic Gates

The Boolean expression F = (A + B' + C)(A + B' + C')(A + B + C) simplifies to:

  1. A + B + C
  2. A + B'
  3. A
  4. A + B'C Correct answer.

Explanation

Combine the first two maxterms: (A + B' + C)(A + B' + C') = A + B' because (X + C)(X + C') = X with X = A + B'. Then multiply by (A + B + C): (A + B')(A + B + C) = A + B'(B + C) = A + B'C. Thus the minimized expression is A + B'C.