Analog and Digital Electronics
Analog and Digital Electronics tests op-amp configurations, diode, BJT and MOSFET operating regions, Boolean minimization, and sequential logic timing. Expect both numerical gain and truth-table questions.
Core rules
- An ideal op-amp with negative feedback has a virtual short v_+ = v_- and zero input current. Inverting gain is -R_f/R_in; non-inverting gain is 1 + R_f/R_in.
- Op-amp output is limited by supply rails and slew rate dV/dt; a large fast step can distort.
- BJT regions are cutoff, active, and saturation; V_BE is about 0.7 V for silicon in the active region. MOSFET has ohmic, saturation, and cutoff regions.
- Boolean identities include A + A'B = A + B, De Morgan's laws, and K-map grouping in powers of two.
- Flip-flops are edge-triggered; setup and hold times constrain data around the clock edge.
- ADC resolution is V_FS/2^n; quantization error is about plus or minus half an LSB.
Worked example
An inverting amplifier uses R_in = 2 kohm and R_f = 10 kohm with V_in = 0.5 V and plus or minus 12 V supplies. Gain = -10/2 = -5, so ideal output is -2.5 V. Since 2.5 V is within the rails, the op-amp stays linear. The reasoning is to compute gain first, then check the output against supply limits and slew-rate constraints.
Traps
Using the virtual short without negative feedback; ignoring output saturation; confusing I_C = beta I_B with saturation; and forgetting that K-map groups may wrap around edges.