Karnataka II PUC Electronics (KSEAB) study materials
Karnataka II PUC Electronics (KSEAB) study resources

Karnataka II PUC Electronics (KSEAB) study plan

Karnataka II PUC Electronics (KSEAB) · Give each week a clear focus.

8 weeks · About 7 hours per week

Week 1

Semiconductor Physics and Diode Applications

  • Derive and sketch the I-V characteristics of a p-n junction from the diode equation, stating what each symbol means and how temperature shifts the curve.

  • Distinguish avalanche and Zener breakdown by mechanism and doping level, and calculate the change in Zener output voltage for a given Zener resistance and current change.

  • Compute ripple factor, regulation percentage, and efficiency for half-wave, full-wave centre-tap, and bridge rectifiers, and justify which circuit suits a given load.

  • Size the smoothing capacitor for a specified ripple voltage given load current, frequency, and supply, and identify the effect of load change on output.

  • Solve numerical problems on diode clipping and clamping circuits by predicting the output waveform for a stated input amplitude and bias.

Your checkpoint

A one-page formula sheet plus 12 solved numericals (4 rectifier, 3 Zener regulator, 3 diode clipper/clamper, 2 characteristic-curve) with final answers boxed and unit-checked.

Week 2

Semiconductor Physics and Diode Applications & Bipolar Junction Transistors and Field-Effect Transistors

  • Explain the working of LED, photodiode, and solar cell in terms of biasing and carrier behaviour, and state one quantitative performance parameter for each.

  • Describe BJT construction, doping and area differences between emitter, base, and collector, and explain why the base is thin and lightly doped.

  • Calculate alpha, beta, and gamma from one another and compute collector, base, and emitter currents in a given bias condition.

  • Draw and label the input and output characteristics of a BJT in CE configuration and mark the active, saturation, and cut-off regions.

  • Compare BJT and JFET operation, and identify the terminals, channel type, and pinch-off condition from a stated device description.

Your checkpoint

A hand-drawn set of four labelled characteristic curves (diode, Zener, CE output, JFET drain) each annotated with region names, with 10 numericals converting current gains and bias currents.

Week 3

Bipolar Junction Transistors and Field-Effect Transistors

  • Analyse a fixed-bias and a voltage-divider-bias CE circuit, computing quiescent collector current and collector-emitter voltage from the resistor values.

  • Determine whether a stated Q-point lies in the active region and predict the effect of a beta change on each bias arrangement.

  • Derive the transconductance relation for a JFET and compute drain current for a given gate-source voltage and pinch-off voltage using the square-law equation.

  • Explain the MOSFET structure with enhancement and depletion types, and state why the gate is insulated and what that implies for input resistance.

  • Compute the small-signal voltage gain of a CE amplifier from its transconductance and load resistance, and state the phase relationship between input and output.

Your checkpoint

A bias-design worksheet: three fully solved DC load-line problems (fixed bias, voltage-divider bias, JFET self-bias) with load lines plotted on graph paper and Q-points marked.

Week 4

Amplifiers and Feedback

  • Classify amplifier configurations by input and output resistance, current and voltage gain, and state which configuration suits impedance matching at input and output.

  • Compute gain, input resistance, and output resistance of a two-stage cascaded amplifier from individual stage values.

  • Distinguish the four negative-feedback topologies by what is sampled and what is mixed, and give one practical use for each.

  • Calculate the closed-loop gain, bandwidth, and distortion change of a feedback amplifier given open-loop gain and feedback fraction.

  • Explain how negative feedback alters input and output resistance for series and shunt mixing, and state the trade-off accepted.

Your checkpoint

A comparison table covering CE, CB, CC, and the four feedback topologies with computed gain/bandwidth numbers for one worked feedback example, plus 8 short numericals on cascaded gain and feedback.

Week 5

Operational Amplifiers and Linear Integrated Circuits & Oscillators and Multivibrators

  • Apply the ideal op-amp assumptions to compute output voltage for inverting, non-inverting, summing, and difference amplifier circuits from given resistor values.

  • Calculate gain and cut-off frequency for an active low-pass and high-pass filter built around an op-amp, and sketch the frequency response.

  • Explain the Barkhausen criterion and compute the required feedback ratio and frequency for an RC phase-shift and a Wien bridge oscillator.

  • Compare astable, monostable, and bistable multivibrators by number of stable states, trigger requirement, and output waveform, and compute the astable period from its RC values.

  • Compute the 555 timer output frequency in astable mode and pulse width in monostable mode from stated component values.

Your checkpoint

A worked problem set of 12 items (6 op-amp circuits with computed outputs, 3 oscillator frequency/gain calculations, 3 multivibrator or 555 timing calculations) with circuit sketches beside each solution.

Week 6

Digital Electronics and Logic Circuits

  • Convert between binary, decimal, octal, and hexadecimal, and perform 2's-complement addition and subtraction for stated 8-bit numbers.

  • Reduce Boolean expressions using Boolean algebra and Karnaugh maps, and implement the reduced form with NAND gates only.

  • Construct truth tables and derive the simplified output expression for half adder, full adder, and 4-to-1 multiplexer circuits.

  • Distinguish combinational from sequential logic and explain the role of the clock in flip-flops.

  • Compute the output of a 4-bit shift register and a counter after a stated number of clock pulses, and state how a flip-flop is used as a latch.

Your checkpoint

A logic-design sheet: 10 K-map reductions with gate-level implementations, truth tables for half/full adder and multiplexer, and a pulse-by-pulse state table for a 4-bit shift register and a 3-bit counter.

Week 7

Communication Systems & Power Electronics and Optoelectronics

  • Explain amplitude modulation in terms of modulation index, sidebands, and bandwidth, and compute the modulation index and sideband power from stated carrier and modulating amplitudes.

  • Compare AM, FM, and PM by bandwidth, noise immunity, and application, and state the function of a mixer and an IF stage in a superheterodyne receiver.

  • Describe the need for modulation, the role of the antenna, and the principle of sky-wave and space-wave propagation with one stated frequency band for each.

  • Explain the working of an SCR, its latching and turn-off conditions, and compute the firing angle effect on a half-wave controlled rectifier output.

  • Distinguish a thyristor from a power transistor in switching behaviour, and explain the two operating states of a diac and triac in AC power control.

Your checkpoint

A communications and power summary: one fully worked AM numerical (modulation index, sideband power, bandwidth), one controlled-rectifier firing-angle calculation, and a half-page comparison chart of AM vs FM and SCR vs triac.

Week 8

Electronic Measurements, Instrumentation and Practical Applications & Semiconductor Physics and Diode Applications & Digital Electronics and Logic Circuits

  • Explain the working of a moving-coil galvanometer, a CRO, and a digital multimeter, and state what each measures and its main limitation.

  • Compute the shunt and multiplier resistance needed to extend an ammeter or voltmeter range from stated meter resistance and current.

  • Describe how a CRO measures amplitude, period, and phase using its time-base and deflection controls, and compute frequency from a stated time-base setting.

  • Re-solve the highest-error questions from weeks 1-7 on diodes, rectifiers, and logic gates under timed conditions to confirm retention.

  • Assemble a final one-page formula and constant sheet covering all nine domains for last-day revision.

Your checkpoint

A timed 20-question mock covering all domains, scored and corrected, plus a single-page master formula sheet and an error log listing every repeated mistake with the corrected rule.

Milestones

Week 2: Can state the diode equation, compute rectifier ripple and regulation, and convert between alpha and beta without notes; 80% or better on the week-1 and week-2 numericals.

Week 4: Can plot a DC load line and mark the Q-point for BJT and JFET bias circuits, and compute closed-loop gain for a feedback amplifier, in under 15 minutes per problem.

Week 6: Can reduce a 4-variable Boolean expression by K-map and derive the op-amp or oscillator output numerically with no reference sheet; all week-5 and week-6 deliverables complete.

Week 8: Scored 70% or above on the full-syllabus timed mock, with the error log showing no repeated mistake category, and the master formula sheet complete across all nine domains.