The Divider That Read 3.1 V Instead of 3.82 V
During a school project, a student builds a 12 V lead-acid battery monitor. R1 = 100 kΩ from the battery positive to the ADC node and R2 = 47 kΩ from the node to ground, giving a calculated 3.84 V at 12.0 V. The microcontroller ADC has a 5.0 V reference and is specified for a source impedance below 10 kΩ. On the bench, a digital multimeter reads 3.82 V, but an older analog multimeter reads only 3.1 V. The ADC value also drifts by about 15 counts when a nearby soldering iron switches on. The teacher asks the student to keep a 0–15 V input range, use only E12 1% resistors from the drawer, and guarantee less than 1% loading error at the ADC pin. The drawer contains 1 kΩ to 1 MΩ resistors and 100 nF ceramic capacitors.
1. Using a Thevenin equivalent, explain why the analog meter reads 3.1 V. Calculate the meter's effective input resistance and judge whether the reading is believable for a 10 kΩ/V meter on its 15 V range.
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Thevenin equivalent at the ADC node
Vth = 12 × 47/(100+47) = 3.84 V Rth = 100 kΩ || 47 kΩ = 31.97 kΩ
The meter is a load from the node to ground. If its resistance is Rm, then 3.1 = 3.84 × Rm/(31.97 k + Rm) 3.1(31.97 + Rm) = 3.84 Rm Rm = 99.1/0.74 ≈ 134 kΩ
A 10 kΩ/V meter on its 15 V range is 150 kΩ, and on its 10 V range is 100 kΩ. The calculated 134 kΩ is therefore plausible for a 10 kΩ/V meter on the 15 V range, allowing for meter tolerance. The DMM, usually 10 MΩ, loads the node by only about 0.3 %, so its 3.82 V reading is trustworthy. The root cause is that the 32 kΩ source resistance is too high for a low-impedance meter and also violates the ADC's below-10 kΩ requirement.
2. Redesign the divider for 0–15 V to 0–5 V using E12 1% resistors, keeping the Thevenin source resistance below 10 kΩ and resistor power below 0.1 W at 15 V. Check the worst-case ratio error from 1% resistors.
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Required ratio = 5/15 = 1/3, so R1 = 2R2. Choose R2 = 10 kΩ and R1 = 20 kΩ, both E12 values.
Rth = 20 kΩ || 10 kΩ = 6.67 kΩ, below 10 kΩ. At 15 V: I = 15/30 kΩ = 0.5 mA; P_R1 = I²R = (0.5 mA)² × 20 kΩ = 5 mW; P_R2 = 2.5 mW. Both are far below 0.1 W. At 12 V the output is 4.0 V.
Worst-case ratio with 1 % resistors:
- Maximum when R2 is +1 % and R1 is −1 %: 10.1/(19.8+10.1) = 0.3378, or +1.35 %.
- Minimum when R2 is −1 % and R1 is +1 %: 9.9/(20.2+9.9) = 0.3289, or −1.33 %.
So the divider ratio error is about ±1.35 %, slightly over 1 %. If 1 % total is mandatory, use 0.1 % resistors or calibrate in software. Loading by the ADC is negligible, but the old 134 kΩ meter would still load this divider by about 4.8 %, so use the DMM for verification.
3. The ADC reading drifts when the soldering iron switches. Explain the likely coupling path and specify a filter and layout fix. Calculate the filter cutoff with 1 kΩ and 100 nF.
Read the worked answer
The soldering iron switches an inductive load, creating fast voltage and current transients. The high-impedance divider node and the meter leads act as an antenna, so noise is capacitively coupled into the ADC input and possibly into the ground reference.
A 100 nF capacitor directly at the ADC node with the 6.67 kΩ Thevenin resistance gives fc = 1/(2π × 6.67 kΩ × 100 nF) ≈ 239 Hz. That helps, but the source impedance is still high. Better: add a 1 kΩ series resistor and 100 nF to ground at the ADC pin, giving fc = 1/(2π × 1 kΩ × 100 nF) ≈ 1.59 kHz. This filters fast transients while keeping the source low. Add a 10 µF bulk capacitor at the board entry, keep the divider close to the MCU, use a twisted pair with a ground return, and average 16 samples in software. Do not place a large capacitor directly on a switched-capacitor ADC input without checking the sampling time.