Digital Electronics and Logic Gates
What this domain tests
This domain covers number systems, Boolean algebra, gate truth tables and simple combinational and sequential blocks. Expect simplification, truth-table completion, flip-flop behaviour and counter questions.
Core rules
- Binary weights are 8-4-2-1. BCD uses four bits per decimal digit, so codes 1010–1111 are invalid. Hexadecimal groups four bits.
- Gate behaviour: AND gives the product, OR the sum, NOT the inversion, XOR is 1 when inputs differ.
- NAND and NOR are universal; any logic function can be built from either alone.
- De Morgan: (A·B)′ = A′ + B′ and (A + B)′ = A′·B′. The bar must cover the whole expression before you split it.
- Useful identities: A + A′B = A + B; A + AB = A; A·A′ = 0; A + A′ = 1.
- Combinational blocks: half adder S = A⊕B and C = AB; a full adder also accepts carry-in; a multiplexer selects one of many inputs, a decoder converts binary to one active line.
- Sequential blocks: SR latch, JK flip-flop (J = K = 1 toggles), D flip-flop (Q follows D at the clock edge), T flip-flop. Flip-flops are edge-triggered; latches are level-sensitive.
- Asynchronous counters ripple stage to stage; synchronous counters are clocked together.
Worked example
Simplify Y = AB′ + AB. Factor out A: Y = A(B′ + B) = A·1 = A. The two product terms cover every row where A = 1 whatever B is, so B is irrelevant to the output.
Traps that cost marks
Putting the bar over only one variable in De Morgan; using the invalid BCD codes; drawing a NAND as AND followed by NOT without inverting the inputs; forgetting that J = K = 1 toggles instead of setting; confusing a counter's modulus with its number of bits.