Maharashtra HSC Electronics (Bifocal) common mistakes
Maharashtra HSC Electronics (Bifocal) · Understand the traps and how to avoid them.
Writing the resistor colour-code value from memory without checking the tolerance band, so a 4-band resistor is reported as exact (e.g. brown-black-red read as 1000 Ω instead of 1 kΩ ±5%) and the multiplier is applied one band too far or too few.
Candidates memorise only the ten digit colours and treat the last band as part of the value; in the HSC practical/viva setting the tolerance and the 'no fourth band means ±20%' rule are examined but rarely practised with real components.
What to do instead
Drill a fixed procedure: read bands from the end nearest the tolerance band, write digit-digit-multiplier first, then append tolerance; practise on 20 mixed resistors and always state the value in both ohms and the nearest preferred value (E12 series), and state the tolerance percentage explicitly in the answer.
Assuming a silicon diode is 'on' at any small forward voltage and calculating current with the full applied voltage, ignoring the 0.7 V barrier (and 0.3 V for germanium), or treating a reverse-biased diode as a short.
The ideal-diode model taught first is retained; students do not switch to the practical model unless the question says so, and they confuse the direction of the arrow with conventional current flow.
What to do instead
Before any diode numerical, draw the circuit, mark the arrow (anode to cathode = conventional current direction), decide on/off state, then apply V_applied − 0.7 V across the resistor. Do five problems each with Si, Ge and ideal models side by side so the difference in answer is visible.
Treating β (hFE) as a constant when finding the Q-point, and using the wrong configuration's formula (e.g. applying the common-emitter gain to a common-base stage), so DC bias and AC gain answers disagree.
Textbook problems often give β once and students reuse it for both DC and AC analysis; the distinction between DC current gain and small-signal hfe, and between the three configurations' input/output resistance and phase shift, is blurred.
What to do instead
Build a one-page comparison table for CB, CE, CC: current gain, voltage gain, input resistance, output resistance, phase shift, typical use. For bias problems, always do DC analysis first (with β), fix the Q-point, then do AC analysis with the small-signal model, and state the assumption made.
Stating the Barkhausen condition for oscillation as 'gain greater than one' only, omitting that the loop phase shift must be 0° or 360°, and misidentifying which network (RC, LC, crystal) sets the frequency in a named oscillator.
The condition is memorised as a slogan; students do not connect the feedback network's phase response to the frequency of oscillation, so they cannot explain why an RC phase-shift oscillator needs three RC sections.
What to do instead
Write the condition as Aβ = 1 with ∠Aβ = 0°/360°, then for each oscillator (RC phase shift, Wien bridge, Hartley, Colpitts, crystal) draw the feedback path and mark where the 180° comes from. Practise deriving f = 1/(2πRC√6) for the three-section RC case at least once.
Simplifying a Boolean expression by 'cancelling' terms that are not actually adjacent in a Karnaugh map, or converting a truth table to a logic circuit without minimising, leaving an unnecessarily complex gate network.
Boolean algebra rules (A + A'B = A + B, absorption, De Morgan) are applied loosely from memory, and K-map grouping rules (groups of 1, 2, 4, 8; wrap-around; don't-care handling) are not practised enough to be reliable under time pressure.
What to do instead
For every problem, first write the truth table, then the canonical SOP, then fill the K-map and circle only power-of-two groups. Verify each simplification by substituting two test input combinations. Memorise and apply De Morgan with brackets drawn explicitly before removing them.
Designing a Zener regulator or a bridge rectifier with filter by picking component values by feel, then failing to check worst-case conditions (maximum load current, minimum input voltage, ripple, Zener power dissipation).
Only the nominal calculation is practised; the regulator's series resistor must satisfy two inequalities at once (enough current at minimum Vin, not too much Zener current at no load), and this two-condition check is rarely drilled.
What to do instead
Use the standard pair of inequalities: R_max = (Vin(min) − Vz)/(Iz(min) + IL(max)) and R_min = (Vin(max) − Vz)/(Iz(max) + IL(min)), then check Pz = Vz × Iz(max). For rectifiers, compute Vdc, Vr(rms) = Idc/(f·C) and PIV = Vm for the bridge, and state each result with units.
Reading an analogue multimeter or CRO scale without applying the correct range multiplier, and quoting a measurement with more significant figures than the instrument's accuracy allows.
The range switch, the scale markings (e.g. 0–10 scale used on the 50 V range) and the difference between peak, peak-to-peak and RMS on a CRO are separate skills that are assumed rather than taught, and candidates copy the raw scale number.
What to do instead
For every reading, state: range selected, scale used, multiplier, and the calculated value with units. On a CRO, always state Vpp first, then Vp = Vpp/2, then Vrms = Vp/√2 for a sine. Practise ten readings from described dial/graticule settings and round to the instrument's stated accuracy.
Confusing modulation types and their bandwidths - e.g. saying FM varies amplitude, or that an AM broadcast channel is 200 kHz wide - and misidentifying the block that performs a function in a superheterodyne receiver.
The block diagram is memorised as a picture without the signal at each stage; the role of the mixer, IF amplifier and AGC, and why the IF is fixed, are not linked to the frequency values.
What to do instead
Draw the superheterodyne chain and write the frequency at each point for a worked example (e.g. 1 MHz received, 455 kHz IF, local oscillator 1.455 MHz). Tabulate AM vs FM: property varied, carrier, bandwidth, noise immunity, propagation. Check bandwidth formulas numerically.
Writing 8051 assembly or C snippets that ignore port configuration and register bit meanings - e.g. reading a port pin without first writing 1 to the port latch, or forgetting to enable the timer run bit - so the described program cannot work.
The architecture is learned as a list of registers (TMOD, TCON, SCON, PCON) without practising the sequence of initialisation steps, and the quasi-bidirectional port behaviour is a detail easily missed.
What to do instead
Memorise an initialisation checklist for each peripheral: for input on Port 1/2/3, write FFH first; for Timer 0 mode 1, set TMOD, load TH0/TL0, set TR0, poll TF0. Write and hand-trace three short programs (delay loop, LED blink, counter) stating the expected register values after each line.
In practical work, powering a circuit before checking polarity and continuity, or soldering with an uncleaned, overheated iron and then reporting a 'faulty component' that is actually a cold joint or reversed electrolytic capacitor.
Lab time pressure leads to skipping the pre-power checklist; the visual and continuity checks are treated as formalities, and the distinction between a dry joint, a short and a damaged component is not systematically diagnosed.
What to do instead
Follow a fixed sequence before every power-up: inspect polarity (electrolytics, diodes, IC notch), check supply rails with a continuity/ohmmeter test with power off, verify supply voltage with a meter before inserting ICs, then power up with current limit. For soldering, tin the tip, keep contact 2–3 s, and inspect joints with a magnifier against a known-good joint.