UGC NET Electronic Science cheat sheet

Boolean algebra laws: De Morgan's theorems give (A·B)' = A' + B' and (A+B)' = A'·B'; XOR satisfies A⊕B = A'B + AB' and A⊕B⊕A = B.

Number systems: a binary number's value equals Σ bᵢ·2ⁱ; 2's complement of an n-bit number is 2ⁿ − N, so subtraction is addition of the complement and the carry-out is discarded.

Combinational design: a K-map with 2ⁿ cells groups 1s in blocks of 2ᵏ; don't-care terms may be included only to enlarge a group, and static-1 hazards are removed by adding the consensus term.

Sequential logic: an n-bit register holds 2ⁿ states; a mod-m counter needs ⌈log₂m⌉ flip-flops, and a shift register's serial output after k clocks is the input delayed by k.

Memory addressing: an n-bit address bus selects 2ⁿ locations; total capacity in bits = (number of words) × (bits per word), and chip count = required capacity ÷ chip capacity.

8051 microcontroller: 4 KB on-chip ROM, 128 bytes RAM, two 16-bit timers, five interrupt sources, four 8-bit ports; machine cycle = 12 oscillator periods.

Op-amp ideal rules: input currents are zero and V₊ = V₋ under negative feedback; closed-loop gain of an inverting amplifier = −R_f/R_in, non-inverting = 1 + R_f/R₁.

Digital logic families: CMOS static power dissipation is negligible (only leakage), while TTL draws supply current per gate; noise margin = V_OH(min) − V_IH(min) for the high state.

Data converters: resolution = V_FS/(2ⁿ − 1) for an n-bit DAC; ADC quantization error is ±½ LSB, and conversion time for a successive-approximation ADC is n clock periods.

Diode circuits: the ideal diode is a short when forward biased and an open when reverse biased; a practical silicon diode drops about 0.7 V, a germanium diode about 0.3 V, and a Zener regulates at V_Z in reverse breakdown.

BJT biasing: in the active region V_BE ≈ 0.7 V and I_C = βI_B; the load-line equation V_CE = V_CC − I_C·R_C fixes the Q-point, and saturation occurs when V_CE < 0.2 V.

MOSFET regions: cutoff when V_GS < V_th, triode when V_DS < V_GS − V_th, saturation when V_DS ≥ V_GS − V_th; in saturation I_D = ½kₙ(V_GS − V_th)²(1 + λV_DS).

Amplifier metrics: voltage gain in dB = 20 log₁₀|A_v|; the gain-bandwidth product of an op-amp is constant, so a closed-loop gain of A gives bandwidth GBW/A; slew rate limits full-power output frequency as f_max = SR/(2πV_p).

Feedback rule: negative feedback reduces gain by (1 + Aβ), raises input resistance and lowers output resistance for a voltage-sampling configuration, and improves bandwidth by the same factor.

Signal analysis: RMS of a sinusoid = V_p/√2; a square wave's fundamental amplitude is 4V_p/π; the Fourier transform of a rectangular pulse of width τ is proportional to sinc(fτ), with first null at f = 1/τ.

Sampling: the Nyquist rate is twice the highest signal frequency; sampling below it aliases a component at |f − k·f_s|, and an anti-aliasing low-pass filter must precede the sampler.

Transmission lines: characteristic impedance Z₀ = √(L/C); reflection coefficient Γ = (Z_L − Z₀)/(Z_L + Z₀); a quarter-wave line of impedance Z₀ transforms Z_L to Z₀²/Z_L.

Modulation: AM bandwidth = 2f_m and total power = P_c(1 + m²/2); FM uses Carson's rule B ≈ 2(Δf + f_m); Shannon capacity C = B log₂(1 + S/N).