ISA CAP cheat sheet

4–20 mA loop: 4 mA = 0% of span (live zero) and 20 mA = 100%; a 250 Ω precision resistor converts loop current to 1–5 V at the input card.

DP flow: Q ∝ √ΔP for turbulent orifice flow, so square-root extraction must be applied in the transmitter or controller; low flow gives poor resolution and large turndown error.

PID parallel (ideal) form u = Kp·e + Ki∫e dt + Kd·de/dt with Ki = Kp/Ti and Kd = Kp·Td; the series/ISA form applies derivative to PV to avoid derivative kick on setpoint changes.

Cascade rule: the inner (secondary) loop must be at least 3–5 times faster than the outer loop, and the outer controller output becomes the inner controller's setpoint.

Dead time (transportation lag) limits achievable loop gain: ultimate gain falls as dead time grows relative to the process time constant, and feedforward can act on a measured disturbance before feedback responds.

Control valve sizing: size for maximum flow at the minimum available pressure drop, with the design point at roughly 60–80% open and 10–20% margin, to avoid an oversized valve operating near closed.

Fail-safe action comes from actuator spring direction: air-to-open = fail-closed, air-to-close = fail-open; a positioner improves response but requires clean, dry instrument air.

Ziegler–Nichols ultimate-cycle tuning: Ku is the proportional gain at sustained cycling and Pu its period; PID settings are Kp = 0.6Ku, Ti = Pu/2, Td = Pu/8.

Temperature sensors: type K (chromel-alumel) is general purpose, J (iron-constantan) and T (copper-constantan, low range) are common; all thermocouples need cold-junction compensation. Pt100 RTD = 100 Ω at 0 °C, ≈0.385 Ω/°C.

Low-demand SIL ranges (IEC 61508): SIL 1 PFDavg 10⁻²–10⁻¹, SIL 2 10⁻³–10⁻², SIL 3 10⁻⁴–10⁻³, SIL 4 10⁻⁵–10⁻⁴; risk reduction factor RRF = 1/PFDavg.

A SIS comprises sensor(s), logic solver, and final element(s); the final element is often the dominant contributor to PFDavg, so valve diagnostics and partial stroke testing are high-value.

Voting architectures: 1oo1 basic, 1oo2 higher safety with more spurious trips, 2oo2 higher availability, 2oo3 both at higher cost; hardware fault tolerance and safe failure fraction constrain achievable SIL.

For a single channel in low-demand mode without diagnostics, PFDavg ≈ (λDU × TI)/2, so doubling the proof test interval doubles PFDavg.

IEC 61511 lifecycle order: hazard and risk assessment → allocation to protection layers → safety requirements specification → SIS design → installation and commissioning → validation → operation and maintenance → modification → decommissioning.

LOPA credits only protection layers that are independent, specific, dependable, and auditable; a SIF is added when the summed IPL risk reduction is below the required risk reduction.

Common cause failure uses a beta factor: redundant group PFD ≈ β × PFD_single + (1−β) × PFD_group; diverse technology, separate impulse lines, and different manufacturers reduce beta.

Spurious trip rate is evaluated alongside PFD; over-conservative voting such as 1oo2 trades safety margin for nuisance trips and lost plant availability.

Bypasses and overrides require documented authorization, compensating measures, and time limits; proof tests must exercise the full SIF response including final elements.

Project phases: conceptual/FEL → detailed design → procurement and fabrication → FAT → installation → SAT and commissioning → startup → closeout; each gate freezes scope and tightens estimate accuracy.

Earned value: CPI = EV/AC, SPI = EV/PV, EAC ≈ BAC/CPI; an index below 1.0 indicates cost overrun or schedule slippage.

Core automation deliverables: P&IDs, instrument index, I/O list, loop drawings, control narrative, cause-and-effect matrix, alarm/trip schedule, and network architecture drawings.

Standards map: ISA-5.1 symbols, ISA-5.4 loop diagrams, ISA-18.2 alarm management, ISA-101 HMI design, ISA-84/IEC 61511 SIS, ISA-88 batch, ISA-95 enterprise integration, IEC 62443 cybersecurity.

FAT confirms vendor hardware and software against specification before shipment; SAT confirms site installation, I/O wiring, and integration; loop checks verify each signal end to end including control action.

Scope changes after design freeze go through management of change with documented impact on cost, schedule, safety, and cybersecurity before approval.

Risk tools: HAZOP applies guide words to process nodes, LOPA tests layer adequacy, and the project risk register ranks probability against impact with named mitigation owners.

Contract types: lump-sum suits a well-defined scope and places quantity risk on the contractor; reimbursable suits undefined scope; unit-price suits quantity-variable work.

I/O and instrument counts drive controller sizing and engineering hours; allow roughly 10–20% spare I/O and spare capacity for future expansion.

ISA-95/Purdue levels: 0 process, 1 sensors and actuators, 2 control (PLC/DCS), 3 operations and MES, 4 ERP; a demilitarized zone separates level 3 from level 4.

IEC 62443 defense in depth: security zones with target security levels joined only by controlled conduits (firewalls, data diodes); no direct OT-to-IT path, plus least privilege and patch management.

Modbus RTU is serial master-slave with register addressing and no authentication; Modbus TCP uses Ethernet port 502 with the same register model and equally no built-in security.

HART superimposes FSK digital data on the 4–20 mA loop for configuration and diagnostics; Foundation Fieldbus H1 runs at 31.25 kbit/s and supports control functions distributed in field devices.

OPC UA provides secure, platform-independent client-server and publish-subscribe data exchange with certificate-based security, replacing OPC DA for historian, MES, and enterprise integration.

Control networks need bounded latency and jitter, so industrial Ethernet uses managed switches, QoS, and ring redundancy (RSTP or MRP) rather than office-grade unmanaged equipment.

Time synchronization: NTP gives millisecond-level log accuracy, while PTP (IEEE 1588) gives sub-microsecond accuracy for sequence-of-events and synchronized control; reference one master clock.

Redundancy can be applied to controllers, networks, power, and I/O; each level adds cost, so select it from the consequence of downtime and required availability rather than by default.

WirelessHART (IEC 62591) is a 2.4 GHz self-healing mesh using time-synchronized channel hopping; suited to monitoring and slow loops, not fast closed-loop control.