Microprocessors and Embedded Systems
Microprocessors and Embedded Systems tests CPU architecture, memory maps, interrupts, peripherals, timing, and low-level C/assembly behavior. Expect register-level reasoning rather than board-specific trivia.
Core rules
- A timer period = (prescaler × reload counts)/timer clock; check whether reload is up-count or down-count.
- Interrupt service routines should be short; shared variables need volatile and atomic access.
- Stack grows per calling convention; alignment and endianness affect data layout.
- Memory-mapped I/O uses ordinary load/store instructions; peripheral clocks must be enabled.
- Watchdog resets recover from lockups but must be serviced within the timeout.
Worked example
A 16 MHz timer clock uses prescaler 64 and counts 1000 ticks per interrupt. Timer tick period is 64/16,000,000=4 µs. Interrupt period is 1000×4 µs=4 ms. If the timer counts from 0 to 999, that is 1000 counts; if it counts 0 to 1000 inclusive, it is 1001 counts and the period is 4.004 ms. At 4 ms, the interrupt rate is 250 Hz. A 1 ms main-loop task must fit between interrupts or it will overrun.
Traps
Forgetting to enable the peripheral clock; using the CPU clock when the timer has a prescaler; non-atomic 16-bit reads on an 8-bit MCU; omitting volatile on ISR-shared flags; and assuming interrupt latency is zero.