NBPTS EMC PE study materials
NBPTS EMC PE study resources

NBPTS EMC PE study plan

NBPTS EMC PE · Give each week a clear focus.

8 weeks · About 6 hours per week

Week 1

Content Knowledge

  • Map the full EMC PE content blueprint into a personal checklist of every tested area, marking each as strong, shaky, or unknown before studying anything

  • Define EMC (electromagnetic compatibility) in your own words and write a one-paragraph explanation distinguishing emissions from immunity and conducted from radiated coupling

  • List the four coupling mechanisms (conducted, capacitive, inductive, radiated) and sketch one realistic example of each from equipment you have worked with

  • Assemble a formula sheet covering decibel conversions, wavelength versus frequency, and field-strength versus distance relationships, then solve five practice conversions without notes

Your checkpoint

A dated self-assessment matrix listing every blueprint area with a confidence rating and a prioritized study order for weeks 2-8

Week 2

Content Knowledge

  • Explain the regulatory landscape from memory: FCC Part 15 Subpart B unintentional radiators, Class A versus Class B limits, and CISPR/IEC international equivalents

  • Compare quasi-peak, peak, and average detectors and justify when each is used during emissions measurement

  • Describe the standard radiated-emissions test setup, including antenna-to-EUT distance, ground-plane requirements, and why the test site matters

  • Interpret a sample emissions plot by identifying a marginal frequency and proposing two mitigation options

Your checkpoint

A two-page comparison table of FCC and CISPR limits and detector types, plus a written interpretation of one emissions plot

Week 3

Content Knowledge

  • Trace how differential-mode and common-mode currents are generated and how each propagates through cables and chassis

  • Explain the role of common-mode chokes, X-capacitors, and Y-capacitors, including the safety constraints on Y-capacitor leakage current

  • Calculate the attenuation in dB of a given filter insertion loss and predict its effect on a marginal emission

  • Diagnose a described failure scenario and select filter topology changes that address the dominant coupling path

Your checkpoint

A worked filter-design problem set of five scenarios, each with a chosen topology and a justification tied to coupling mode

Week 4

Content Knowledge

  • Describe shielding effectiveness as a function of frequency and material, and explain absorption loss versus reflection loss

  • Identify aperture, seam, and cable-penetration leakage paths in a described enclosure and rank them by likely severity

  • Explain grounding and bonding strategies for chassis, signal reference, and safety grounds, and where single-point versus multi-point grounding applies

  • Solve three shielding-effectiveness calculations and state the assumptions behind each result

Your checkpoint

A shielding and grounding case analysis of one described enclosure, with a ranked leakage-path list and three concrete design fixes

Week 5

Content Knowledge

  • Outline the IEC 61000-4 immunity test family and match each test (ESD, radiated RF, EFT/burst, surge, conducted RF, dips and interruptions) to its typical threat source

  • Describe ESD test levels, contact versus air discharge, and the failure modes ESD typically provokes in digital circuitry

  • Explain transient-protection device selection: TVS clamping voltage, response time, capacitance loading, and coordination with series impedance

  • Predict how a described product would behave under a burst test and propose protection and layout changes

Your checkpoint

An immunity test matrix mapping six IEC 61000-4 tests to threat sources, typical levels, and one design countermeasure each

Week 6

Content Knowledge

  • Apply PCB layout rules for EMC: return-path continuity, reference-plane splits, clock routing, and connector placement

  • Explain why clock harmonics dominate radiated emissions and calculate which harmonic of a given clock falls in a band of concern

  • Describe spread-spectrum clocking, slew-rate control, and series termination, including the tradeoffs each introduces

  • Review a described two-layer board layout narrative and list at least five EMC defects with corrections

Your checkpoint

A PCB EMC design-rule checklist of at least fifteen items, each with the failure it prevents and a verification method

Week 7

Content Knowledge

  • Explain pre-compliance versus full-compliance testing and the value of in-house near-field probing and spectrum analysis

  • Interpret near-field probe results to localize an emission source and distinguish electric-field from magnetic-field dominance

  • Design a debug sequence for a failing radiated-emissions test, ordering actions from least to most invasive

  • Describe cable and connector mitigation: ferrites, shielded cables, 360-degree pigtail termination, and common-mode filtering at the connector

Your checkpoint

A written step-by-step debug procedure for a radiated-emissions failure, with decision points and expected evidence at each step

Week 8

Content Knowledge

  • Synthesize all prior weeks into a single one-page EMC design and compliance summary written from memory

  • Complete a timed 40-question self-test drawn from your own checklist and score it against your notes

  • Re-teach the three weakest blueprint areas in writing, at the level of detail required to explain them to a colleague

  • Build a final one-page quick-reference card covering limits, coupling modes, filter and shield formulas, and immunity tests

Your checkpoint

A scored practice test with a written error log naming each miss, its root cause, and the correction

Milestones

Week 2: Score at least 80 percent on a self-quiz covering regulatory limits, detector types, and emissions test setup, using only your own notes as source material

Week 4: Correctly identify the dominant coupling mode and propose a workable fix in at least four of five filter and shielding scenarios without consulting references

Week 6: Complete the PCB design-rule checklist and find at least five of the seeded defects in the practice layout narrative

Week 8: Achieve 85 percent or higher on the timed 40-question self-test and have every missed item logged with a root cause and correction