NVIDIA NCA-AIIO study plan

Diagram the data-center GPU memory hierarchy (registers, L1/shared, L2, HBM) and label approximate bandwidth at each level for two current NVIDIA GPU families

Compare MIG partitioning against whole-GPU allocation and compute how many slice profiles of a given size fit into one device

Estimate FLOPs and memory footprint for one forward and one backward pass of a small transformer with stated dimensions

Build a spreadsheet that converts a target training throughput into required GPU count at a stated model-FLOPs-utilization figure

Contrast NVLink/NVSwitch, PCIe, and InfiniBand/RoCE on per-link bandwidth, latency, and scaling domain, and identify when each is the limiting fabric

Compute bisection bandwidth and oversubscription ratio for a fat-tree and a rail-optimized topology at 32 and 128 nodes

Trace the data path for GPUDirect Storage and RDMA transfers, naming where the DPU sits and what it offloads

Select an interconnect for three stated workload scenarios and defend each choice with calculated numbers

Assemble a reference-architecture-style bill of materials (compute, network, storage, power, cooling) for a stated 64-GPU cluster

Estimate rack power draw and cooling requirement from GPU TDP, node overhead, and a stated PUE, and name the binding constraint

Distinguish training, fine-tuning, and inference workload profiles and identify which infrastructure resource each stresses hardest

Map every line item in the bill of materials back to the workload requirement it satisfies

Define and correctly apply parameters, FLOPs, epochs, batch size, learning rate, loss, overfitting, and underfitting in written explanations

Compare CNN, RNN, transformer, and diffusion architectures on inductive bias, parallelism, and scaling behavior

Walk through the full training loop and the inference path end to end, naming exactly what differs between them

Describe the data pipeline stages - ingest, curation, labeling, augmentation, and train/validation/test splitting - and the failure each stage prevents

Convert between FP32, TF32, FP16, BF16, FP8, and INT8 on dynamic range, mantissa precision, and typical training or inference use

Calculate memory savings and quality trade-offs from quantization and mixed precision for three stated model sizes

Explain at a conceptual level what the major GPU acceleration libraries and toolkits do and which workloads each targets

Explain how model-FLOPs utilization, multi-GPU scaling efficiency, and communication overhead jointly bound achievable training performance

Describe the model lifecycle from experiment tracking through registry, deployment, monitoring, and retraining, naming the artifact at each handoff

Explain the containerized AI stack: NGC containers, CUDA version compatibility, and the responsibilities of the GPU Operator

Compare batch and real-time inference deployment patterns on latency, utilization, and infrastructure cost

Map operational signals - latency, throughput, GPU utilization, memory headroom - to the specific failure modes each would reveal

Explain Kubernetes GPU scheduling mechanics: device plugin, node labels, taints and tolerations, and MIG-aware allocation

Choose between Slurm and Kubernetes for three stated scenarios and justify each on scheduling, isolation, and operational overhead

Select DCGM and system-management telemetry metrics and set alert thresholds for GPU utilization, ECC errors, thermal throttling, and XID events

Write a troubleshooting runbook covering five failure modes: XID errors, ECC faults, thermal throttling, collective-communication timeouts, and GPU out-of-memory

Complete two full-length timed practice sets under exam conditions and classify every miss by root cause

Re-derive the highest-value 20 formulas and facts from memory on a blank sheet without notes

Rebuild weak areas flagged by practice scores into a prioritized final revision list and close the top three

Rehearse exam pacing and question-triage strategy for flagged or time-consuming items