PEC EPE Computer & Allied key terms

A variable that stores the memory address of another variable or object rather than a data value itself, allowing indirect access, dynamic structures, and pass-by-reference behavior in languages such as C.

A last-in-first-out data structure where insertion and removal both occur at one end; also the memory region holding function call frames, local variables, and return addresses during program execution.

A programming technique in which a function calls itself on a smaller version of the same problem, requiring a terminating base case and consuming call-stack space for each pending invocation.

A mathematical notation describing the upper bound on how an algorithm's running time or memory use grows as input size increases, ignoring constant factors and lower-order terms.

The process of organizing tables and columns to reduce redundancy and prevent update, insert, and delete anomalies, typically by ensuring each non-key attribute depends only on the primary key.

A column or minimal set of columns whose values uniquely identify each row in a table, cannot be null, and is enforced by a uniqueness constraint in a relational database.

An operation combining rows from two or more tables based on a related column, commonly an inner join matching only paired rows or an outer join retaining unmatched rows from one side.

A rectangular grid arranging truth-table minterms so adjacent cells differ by one variable, used to visually group terms and derive a minimized sum-of-products Boolean expression by hand.

A set of algebraic rules governing binary variables using AND, OR, and NOT operations, including De Morgan's laws and distributivity, used to simplify and prove equivalence of logic expressions.

An input combination in a digital circuit whose output value is irrelevant because it never occurs or is never observed, allowing the designer to choose whichever value simplifies the logic.

Timing constraints requiring a flip-flop's data input to remain stable for a specified interval before and after the active clock edge, so the correct value is reliably captured.

A bistable synchronous storage element that holds one bit and updates its output on a clock edge, forming the basis of registers, counters, and sequential state machines.

The difference in arrival time of the same clock edge at different registers in a synchronous design, which can erode timing margins and cause setup or hold violations.

A memory region containing the addresses of interrupt service routines, indexed by interrupt number, which the processor reads to jump to the correct handler when an interrupt is acknowledged.

An addressing scheme in which peripheral registers occupy the same address space as memory, so ordinary load and store instructions can read and write hardware devices.

A short program executed by the processor in response to an interrupt, which services the requesting device, saves and restores context, and typically ends with a return-from-interrupt instruction.

A method of expressing voltages, currents, powers, and impedances as dimensionless ratios to chosen base values, simplifying transformer and multi-voltage-level power system calculations.

The ratio of real power to apparent power in an AC circuit, equal to the cosine of the angle between voltage and current, indicating how effectively current delivers useful work.

The component of AC power that oscillates between source and reactive elements without net energy transfer, measured in var and required to build magnetic fields in inductors and electric fields in capacitors.

The total opposition of a circuit to alternating current, a complex quantity combining resistance with inductive and capacitive reactance, expressed in ohms with magnitude and phase angle.

An AC supply arrangement of three equal-magnitude voltages displaced by 120 electrical degrees, delivering constant total power and using delta or wye connections for transmission and distribution.

A transformation decomposing an unbalanced three-phase set of phasors into positive-, negative-, and zero-sequence balanced sets, enabling fault analysis using single-phase equivalent circuits.

The maximum prospective short-circuit current a network can deliver at a given point, determined by source and path impedance, used to select interrupting ratings and set protection settings.

A device that continuously monitors current, voltage, or other quantities and initiates a trip signal to a circuit breaker when conditions exceed set thresholds indicating a fault.

The deliberate selection of relay pickup and time-delay settings so that the protective device nearest a fault trips first, isolating the smallest possible section of the network.

A steady-state study computing bus voltage magnitudes and angles, real and reactive power flows, and losses across a network for specified generation and load conditions.

The ratio of the Laplace transform of a system's output to that of its input under zero initial conditions, characterizing the system's input-output dynamics independent of signal shape.

Values of the Laplace variable at which a transfer function's denominator or numerator equals zero; poles govern natural response and stability, while zeros shape the response and block specific frequencies.

A control scheme that measures the actual output, compares it with a reference setpoint to form an error signal, and adjusts the input to reduce that error despite disturbances.

A feedback controller producing a control action from the weighted sum of the error, its integral over time, and its rate of change, tuned to balance speed, accuracy, and stability.

A test determining whether a closed-loop system returns to equilibrium after disturbance, such as requiring all characteristic-equation roots to lie in the left half of the s-plane.

A plot of the paths traced by closed-loop poles in the s-plane as a system parameter, usually gain, varies from zero to infinity, used to assess stability and transient response.

The principle that a bandlimited signal must be sampled at more than twice its highest frequency component to be reconstructed without aliasing distortion.

Distortion in which frequency components above half the sampling rate appear as false lower-frequency components in the sampled signal, prevented by anti-alias filtering before sampling.

An efficient algorithm computing the discrete Fourier transform in roughly N log N operations instead of N squared, enabling practical spectral analysis of sampled signals.

A high-gain differential voltage amplifier used with external feedback networks to implement amplification, filtering, summation, and integration in analog signal-processing circuits.

The ratio, usually in decibels, of a differential amplifier's differential gain to its common-mode gain, expressing how well it rejects identical signals present on both inputs.

A configuration in which a fraction of the output is subtracted from the input, reducing gain but improving bandwidth, linearity, input impedance, and immunity to parameter variation.

A situation where a professional's personal, financial, or other interest could improperly influence engineering judgment, requiring disclosure and often withdrawal from the affected decision.

A published set of principles binding members of a profession to prioritize public safety, health, and welfare, maintain competence, and act honestly with clients and employers.

Disclosing wrongdoing or danger within an organization to an authority or the public, typically justified when internal channels fail and serious harm to safety or health is likely.

The degree of care and skill a reasonably competent engineer would exercise under similar circumstances, used as the benchmark for judging negligence in professional practice.