BCS Written EEE (892) common mistakes
BCS Written EEE (892) · Understand the traps and how to avoid them.
Writing the per-unit or SI answer without stating the base quantities (MVA base, kV base, or the actual voltage/current reference) used to derive it, so a numerically correct working earns no credit because the marker cannot reconcile the units.
Candidates drill per-unit arithmetic as a mechanical conversion and treat the base as an implicit assumption, forgetting that per-unit values are meaningless until the base is declared and that examiners award method marks for stated assumptions.
What to do instead
Adopt a fixed answer template: draw the single-line diagram, write 'Base: S = ___ MVA, V = ___ kV at ___ bus', convert every impedance to that base before solving, and finish by converting the result back to amperes/volts with the conversion shown. Practise ten short problems where only the base declaration is graded.
Applying a memorised formula outside its validity range - e.g. using the approximate voltage-drop expression for a short line on a medium line, or using the transformer EMF equation with saturation ignored for a highly saturated core - without checking the stated assumptions.
Revision is organised as formula lists keyed to topic names rather than to derivation conditions, so the candidate recognises the topic but not the boundary (line length, X/R ratio, linearity, small-signal operation) at which the formula breaks down.
What to do instead
For each major formula, write a one-line 'valid when' note beside it in the revision sheet (e.g. short line: length under about 80 km and capacitance neglected; nominal-pi: up to about 250 km). Before substituting numbers, explicitly write the assumption check and the justification in one sentence.
Solving a DC machine or induction motor problem without first fixing the circuit model and reference directions - mixing generator and motor sign conventions, or omitting rotational losses and field copper loss - producing answers that are internally inconsistent between current, torque and efficiency.
Candidates jump straight to the torque or speed equation because it looks familiar, skipping the free-body and power-flow sketch that would expose sign and loss-term errors early.
What to do instead
Always begin with a power-flow diagram (input electrical, airgap power, mechanical developed, output shaft) and label every loss arrow before writing equations. Verify with an energy balance: input must equal output plus all losses to within rounding. Do this even when the question asks only for efficiency.
Drawing a control system or power-electronics answer as a block diagram with unlabelled blocks and no signal names, transfer functions or waveforms, so the marker cannot tell whether the candidate understands the loop or has merely recognised the topology.
Under time pressure candidates sketch the topology from memory and assume the marker shares their mental model, and many have never practised producing annotated diagrams because they revise from text summaries.
What to do instead
Impose a diagram standard: every block carries its transfer function or gain, every arrow carries a signal name and units, and every switching or control diagram is accompanied by a small labelled waveform sketch (duty cycle, gate pulse, output ripple). Rehearse by redrawing five standard topologies (buck, boost, PI current loop, PLL, compensator) from memory to that standard.
In digital and microprocessor questions, presenting a truth table or state diagram without a minimisation step, or writing assembly/embedded code without stating the memory map, register usage and timing assumptions, so the design is untestable and loses design marks.
Candidates learn the final expression rather than the design procedure, and code is written as if for a compiler with unlimited registers rather than for a specified microcontroller with a fixed clock and pin assignment.
What to do instead
Use a fixed design write-up order: specification, truth table or state table, minimisation with Karnaugh map or state reduction shown, implementation, and a verification case. For embedded answers, add a short resource table (ports, timers, interrupts, clock frequency, cycle budget) and one worked trace of the code for a sample input.
Answering ethics and engineering-management questions with generic moralising ('safety is important', 'communication is key') instead of applying a named framework, identifying the stakeholders, the conflicting obligations and the specific course of action with its consequences.
These domains are perceived as soft and are revised last, so candidates lack the vocabulary of codes of ethics, duty to the public, whistleblowing channels and professional responsibility, and default to platitudes.
What to do instead
Prepare a reusable four-step template: identify the facts and the technical uncertainty; list stakeholders and their claims; identify the governing obligation (public safety and welfare first, then employer, client, profession); recommend a specific action with escalation path and documentation. Practise on five short scenarios, each answered in under 150 words with the template visible.
Treating numerical methods and quantitative questions as pure arithmetic - reporting a root, integral or probability to full calculator precision with no statement of method, convergence criterion, iteration count or error bound.
Candidates equate 'numerical' with 'compute the number', and coursework has rewarded final answers rather than the audit trail a professional calculation requires.
What to do instead
For every numerical answer, show the method and formula, the iteration table or step size, the stopping criterion actually met, and the result rounded to a physically sensible precision with a note on truncation or round-off error. Where two methods are available, state why the chosen one is appropriate for the function's behaviour.
Ignoring the physical layer in communication and networking answers: quoting a data rate or protocol name without computing bandwidth, signal-to-noise ratio, channel capacity, propagation delay or link budget, and describing a protocol stack without tying each layer to a concrete function and header field.
Protocol names are easier to memorise than the quantitative relationships behind them, and candidates rarely connect Shannon capacity, Nyquist signalling and modulation order into one calculation chain.
What to do instead
For any communication question, force a quantitative skeleton: required rate, available bandwidth, required SNR from the modulation and target error rate, resulting capacity, and margin. For networking, draw the layered encapsulation for the specific scenario and name the field or mechanism at each layer that performs the stated function.
Attempting every question briefly rather than the required number in depth - starting six or seven answers, running out of time, and leaving several half-finished with no conclusion, when the paper rewards complete, well-structured answers.
Fear of a difficult question drives candidates to 'bank' easy marks across many questions, and there is no rehearsal of the actual time budget per question under exam conditions.
What to do instead
Do three full timed mock papers with a written allocation plan (minutes per question including a reading and selection phase), and enforce a rule: choose the required number plus one backup, then do not open a new question until the current one has a conclusion. Mark the mocks against the allocation plan, not just the content.
Presenting circuit-analysis working with no defined reference node, assumed current directions or sign convention, so a single sign slip propagates silently and the candidate cannot self-check the result.
Textbook problems supply the diagram with directions already marked, so candidates never build the habit of declaring their own conventions when the question gives only a topology or a verbal description.
What to do instead
Before writing any equation, redraw the circuit, mark the reference node, label every branch current with an arrow, and state the convention ('currents entering the node are positive'). Finish with an independent check: power balance, superposition on one branch, or Thevenin equivalence at the terminals of interest.