HKIE Professional Assessment - Electronics Discipline study materials
HKIE Professional Assessment - Electronics Discipline study resources

HKIE Professional Assessment - Electronics Discipline study plan

HKIE Professional Assessment - Electronics Discipline · Give each week a clear focus.

8 weeks · About 6 hours per week

Week 1

Electronics Engineering Practice

  • Map the Domain 1 syllabus into a one-page checklist covering component selection, tolerance and derating, PCB layout, EMC/ESD, thermal management, reliability and testability

  • Derive and tabulate derating rules for resistors, capacitors, semiconductors and connectors against typical industrial and safety-critical margins

  • Work through five hand calculations on trace current capacity, voltage drop and thermal rise, and record the assumptions used in each

  • Build a personal glossary of 40 electronics-practice terms with a one-line definition and a worked example for each

Your checkpoint

A 6-8 page Domain 1 revision note containing the syllabus checklist, the derating table and the five worked calculations with stated assumptions

Week 2

Electronics Engineering Practice

  • Explain the design review and verification cycle from requirements capture through prototype, qualification and production release

  • Compare EMC mitigation techniques for conducted and radiated emissions and justify a chosen technique for two concrete product scenarios

  • Assess failure modes using FMEA logic on a simple power supply and rank at least six failure modes by severity and detection

  • Interpret a typical environmental and reliability test schedule (temperature cycling, damp heat, vibration, burn-in) and state the acceptance criteria

Your checkpoint

A completed FMEA worksheet for a notional DC power supply with severity, occurrence and detection ratings plus recommended actions

Week 3

Electronic Circuit and System Design

  • Analyse analogue building blocks (biasing, small-signal gain, feedback stability, op-amp non-idealities) and solve eight numerical problems without reference notes

  • Design and calculate a switched-mode converter stage: duty cycle, inductor ripple, output capacitor sizing and switching loss estimate

  • Draw and explain the signal integrity implications of a high-speed digital interconnect: transmission line, termination, crosstalk and return path

  • Compare linear versus switching regulation and justify a topology choice for given load, efficiency and noise requirements

Your checkpoint

A design calculation pack for one analogue and one switching regulator, each with schematic-level component values, loss budget and a stated design margin

Week 4

Electronic Circuit and System Design & Signals, Communications and Embedded Systems

  • Design a mixed-signal chain from sensor to ADC, selecting anti-alias filter order, resolution and sampling rate against a stated accuracy target

  • Quantify noise sources (thermal, shot, quantisation, reference) and compute an overall noise budget for that chain

  • Apply sampling theory and aliasing reasoning to three signals and identify the required filter corner in each case

  • Simulate or hand-verify the frequency response and step response of a second-order filter and state the stability margin

Your checkpoint

A sensor-to-ADC signal chain report with noise budget table, filter design and a verification plot or tabulated response showing margin against the accuracy target

Week 5

Signals, Communications and Embedded Systems

  • Work through modulation and coding fundamentals: AM/FM, QAM, OFDM and error-correcting codes, and compute bit error rate trends for at least two schemes

  • Calculate link budgets including transmit power, path loss, antenna gain, noise figure and required Eb/N0 for a given data rate

  • Explain real-time embedded architecture: interrupt latency, scheduling, watchdog and memory partitioning, and map each to a design decision

  • Compare common embedded buses (I2C, SPI, UART, CAN, Ethernet) on speed, determinism, topology and fault behaviour

Your checkpoint

A link budget spreadsheet plus a one-page embedded architecture decision record covering bus choice, timing budget and fault handling

Week 6

Engineering Management, Contracts and Professional Ethics

  • Outline the project lifecycle under a standard form of contract and identify the obligations of employer, engineer and contractor at each stage

  • Distinguish professional negligence, breach of contract and statutory liability, and apply the distinction to three short scenarios

  • Apply a recognised code of professional conduct to resolve four ethical dilemmas involving conflicts of interest, safety and confidentiality

  • Explain variation, extension of time, delay and liquidated damages mechanisms and calculate a simple entitlement

Your checkpoint

Four written ethics and contract case responses, each 300-400 words, with the governing principle, the decision and the reasoning stated explicitly

Week 7

Hong Kong Statutory, Safety and Regulatory Framework

  • Map Hong Kong statutory duties relevant to electrical and electronic works: electricity supply regulations, wiring regulations and the role of the registering authority

  • Identify the safety obligations for design, installation, inspection and testing, and state who holds each duty

  • Summarise the regulatory route for placing electrical products on the Hong Kong market, including conformity assessment and labelling expectations

  • Explain professional registration and discipline mechanisms for engineers in Hong Kong and the consequences of non-compliance

Your checkpoint

A two-page statutory and regulatory reference sheet cross-referencing each obligation to its source instrument and the responsible party

Week 8

Electronics Engineering Practice & Electronic Circuit and System Design & Signals, Communications and Embedded Systems & Engineering Management, Contracts and Professional Ethics & Hong Kong Statutory, Safety and Regulatory Framework

  • Sit two full-length timed mock assessments under exam conditions and record score by domain

  • Re-teach the three weakest sub-topics from the mock results using the notes produced in weeks 1-7

  • Consolidate all deliverables into a single indexed revision pack with a one-page summary per domain

  • Rehearse concise written answers to professional-assessment style questions, targeting structure, assumptions and conclusion

Your checkpoint

A complete indexed revision pack plus a mock score log showing improvement between the two attempts and a prioritised list of residual weak areas

Milestones

Week 2: Can state derating rules and FMEA reasoning from memory and complete a 20-question Domain 1 self-test at 70% or above

Week 4: Can produce a full noise budget and regulator loss calculation unaided within 30 minutes, with all assumptions written down

Week 6: Can write a structured 300-word response to an unseen ethics or contract scenario scoring full marks against a self-made rubric of principle, decision and reasoning

Week 8: Second mock attempt scores at least 65% overall with no single domain below 55%, and every week's deliverable is present in the indexed pack