Tamil Nadu HSE First Year Basic Electronics Engineering common mistakes
Tamil Nadu HSE First Year Basic Electronics Engineering · Understand the traps and how to avoid them.
When asked to find the equivalent resistance of a series-parallel network, the candidate adds all resistor values together regardless of how they are connected, or treats a parallel pair as a series pair.
The candidate memorises the two formulas R = R1 + R2 and 1/R = 1/R1 + 1/R2 but never learns the identifying test (does the same current pass through both elements, or do they share the same two nodes?). Textbooks often present the formulas before the node-identification skill, so under exam pressure the candidate pattern-matches on numbers rather than on topology.
What to do instead
Before any arithmetic, redraw the circuit and label each node with a letter. Two elements are in series only if they share a node with nothing else attached; two elements are in parallel only if both their ends touch the same two node letters. Practise by redrawing ten mixed networks node-by-node and writing the series/parallel decision for each pair before computing. Also sanity-check the answer: an equivalent resistance must always be smaller than the smallest parallel branch and larger than the largest series element.
The candidate writes the resistor colour code from the wrong end, or reports the tolerance band as a significant digit (for example reading brown-black-red-gold as 102 ohms instead of 1 kilo-ohm).
The candidate learns the colour-to-digit mapping but not the reading convention (start at the end opposite the tolerance band; gold and silver are never digits). In a written exam the resistor is described in words, so the candidate has no physical cue and falls back on reading left to right.
What to do instead
Memorise the two rules explicitly: the tolerance band is gold (5 percent) or silver (10 percent) and is always read last, and the first band is never gold or silver. Drill by converting twenty described resistors in both directions (bands to value, value to bands) and state the tolerance in ohms as well as percent, since exam questions often ask for the permissible range rather than the nominal value.
When sketching or describing a half-wave rectifier, the candidate draws the diode in the return path or claims the output frequency equals the input frequency, and for a full-wave rectifier states the ripple frequency as 50 Hz on a 50 Hz supply.
The candidate memorises 'diode conducts in one direction' but never traces the actual current loop through the load, and the frequency relationship is learned as a bare fact without the reasoning that a full-wave circuit produces two output pulses per input cycle.
What to do instead
For every rectifier question, trace the current path arrow by arrow on the diagram for both half cycles and mark which half cycle is blocked. Then derive the ripple frequency: count output pulses per input cycle (one for half-wave, two for full-wave and bridge) and multiply by the supply frequency. Write the number with units and state the formula f_ripple = n times f_supply so the examiner sees the reasoning.
The candidate states that the emitter current equals the base current plus the collector current but then substitutes beta as I_C/I_B into the wrong branch, or treats alpha and beta as interchangeable, producing a current gain larger than the transistor can give.
The three currents and the two gain symbols look similar, and the candidate learns the definitions without the constraint that alpha is always less than one and beta equals alpha divided by (1 minus alpha). Sign conventions and the fact that I_E is the largest current are not reinforced.
What to do instead
Anchor on the two identities I_E = I_B + I_C and beta = alpha/(1 - alpha), and always check that I_E is the largest of the three and that alpha is below 1. Work a fixed set of numerical problems (given I_B and beta, find I_C and I_E; given alpha, find beta) until the substitution order is automatic, and write the identity being used beside each line of working.
The candidate answers questions about a JFET or MOSFET by describing it as current-controlled, or claims the gate current of an FET is large, or confuses depletion and enhancement modes when identifying the transfer characteristic.
The candidate studies the BJT first and carries the base-current mental model across to field-effect devices, where the control is by gate-source voltage and the gate draws almost no current. Depletion and enhancement behaviour is often memorised as two curves without the physical meaning of the channel.
What to do instead
Build a one-page comparison table with rows for control quantity, input current, input resistance, characteristic equation and typical application, and fill it from memory before revising. For the modes, state in words what happens at zero gate-source voltage: a depletion device conducts, an enhancement device is off. Then test yourself by predicting the drain current direction for each mode before checking.
The candidate converts a logic statement into a gate circuit but writes the truth table with the rows in the wrong binary order, or omits rows, so a three-input problem is answered with four rows or with duplicated combinations.
The candidate focuses on the Boolean expression and treats the truth table as a formality, so the systematic enumeration of 2 to the power n combinations is skipped. Off-by-one ordering errors then propagate into the final gate diagram.
What to do instead
Adopt a fixed enumeration habit: for n inputs write 2 to the power n rows, with the leftmost column alternating in blocks (half the rows 0, half 1), the next column halving the block size, and so on, exactly like binary counting. Verify the last row is all ones and the first is all zeros. Only after the input columns are complete should the output column be filled, and the final gate circuit should be read back against the table row by row.
The candidate describes an ideal op-amp as having infinite input impedance but then applies the virtual-short condition to a circuit with no negative feedback, or states the output voltage of an open-loop comparator as zero because the inputs are equal.
The two golden rules (no input current, and equal input voltages) are memorised as slogans without the precondition that they hold only in a negative-feedback configuration with the output not saturated. The candidate also forgets that an ideal op-amp has infinite open-loop gain, so any input difference drives the output to a rail.
What to do instead
Before applying the golden rules, state in writing whether the circuit has a feedback path from output to the inverting input. If yes, use virtual short and virtual ground and solve by nodal analysis. If no, treat the device as a comparator and answer in terms of saturation at the supply rails. Also memorise the standard closed-loop gains for inverting and non-inverting configurations and check that a non-inverting gain is never below one.
The candidate reads an analogue multimeter scale from the wrong side, or reports a voltmeter reading without accounting for the range selected, and confuses the meaning of the shunt and multiplier resistors.
Analogue meter scales are non-linear and numbered right to left on some ranges, and the candidate practises on digital displays where the value is given directly. The shunt and multiplier are learned as two resistor names without the circuit position that distinguishes them.
What to do instead
Practise reading a described scale: state the full-scale value, count the minor divisions, compute the value per division, then multiply by the pointer position, and always quote the range with the answer. For range extension, draw the meter movement with the resistor in parallel (shunt, for current) and in series (multiplier, for voltage), and note that a shunt is a low resistance while a multiplier is a high resistance.
The candidate explains modulation only as 'carrying the signal' without naming which property of the carrier is varied, and mixes up the bandwidth or the sideband content of amplitude and frequency modulation.
Communication topics are often revised as vocabulary lists near the end of the course, so the candidate recognises terms such as carrier, sideband and modulation index without being able to connect them to a waveform or a spectrum.
What to do instead
For each modulation scheme, write one sentence of the form 'the information changes the amplitude/frequency/phase of the carrier', then sketch the waveform for a single tone and mark the sidebands. Learn that amplitude modulation with a single tone gives a carrier plus two sidebands occupying twice the modulating frequency, while frequency modulation gives an infinite sideband set with a wider bandwidth, and state the modulation index formula for each.
The candidate describes a good solder joint as 'shiny and smooth' but cannot state the iron temperature, the order of tinning, or why a cold joint is a fault, and draws a printed circuit board track crossing another track on the same copper layer.
Practical work is learned by watching rather than by articulating the procedure, so the candidate has the visual image of a joint without the process parameters, and the single-layer routing constraint is not made explicit in most notes.
What to do instead
Learn a short written procedure: clean and tin the bit, heat the joint and feed solder to the joint not the bit, remove solder then iron, aim for a concave fillet at about 300 to 350 degrees Celsius with a briefly heated joint. Explain a cold joint as insufficient heat giving a grainy, high-resistance connection. For board layout, state that tracks on the same side must not cross, so a crossover is made with a jumper wire or by routing on the other side through a via, and check any sketch against that rule.