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ALU 101 practice questions

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Question 1Arithmetic Logic Unit Fundamentals

Which arithmetic operation does a half adder perform on two single bits?

  1. Subtraction of the two bits with a borrow output
  2. Multiplication of the two bits with a carry output
  3. Comparison of the two bits with an equality output
  4. Addition of the two bits with a carry output Correct answer.

Explanation

A half adder combines two input bits to produce a sum bit and a carry bit, which is exactly the binary addition of two one-bit values. Subtraction, multiplication, and comparison require different logic structures.

Question 2Arithmetic Logic Unit Fundamentals

In a full adder, how many input bits does the circuit accept?

  1. One
  2. Four
  3. Three Correct answer.
  4. Two

Explanation

A full adder accepts two operand bits plus an incoming carry bit, giving three inputs and two outputs (sum and carry-out). A half adder accepts only two inputs.

Question 3Arithmetic Logic Unit Fundamentals

Which logic gate produces a HIGH output only when its two inputs differ?

  1. XNOR
  2. NOR
  3. XOR Correct answer.
  4. AND

Explanation

The exclusive-OR gate outputs 1 when exactly one input is 1, which is the definition of differing inputs. The other gates output 1 under different input conditions.

Question 4Arithmetic Logic Unit Fundamentals

What is the primary function of a multiplexer in a datapath?

  1. To increment a binary count each clock
  2. To select one of several inputs for output Correct answer.
  3. To store a value across clock cycles
  4. To convert parallel data to serial form

Explanation

A multiplexer routes one selected input to its single output based on select lines, making it the standard choice element in a datapath. Storage, counting, and serialization are performed by other components.

Question 5Arithmetic Logic Unit Fundamentals

How many select lines are needed for an 8-to-1 multiplexer?

  1. Eight
  2. Four
  3. Three Correct answer.
  4. Two

Explanation

The number of select lines equals the base-2 logarithm of the number of data inputs, so 8 inputs require log2(8) = 3 select lines. Two lines address only four inputs and four lines address sixteen.

Question 6Arithmetic Logic Unit Fundamentals

What does the carry-out of the most significant bit of an unsigned adder indicate?

  1. The result is negative
  2. An overflow beyond the representable range Correct answer.
  3. A parity error occurred
  4. The operands were equal

Explanation

For unsigned arithmetic, a carry out of the highest bit means the true sum exceeds the largest value the word width can hold, which is unsigned overflow. Signed overflow uses a different rule based on the sign bits.

Question 7Arithmetic Logic Unit Fundamentals

Which operation does an arithmetic right shift perform on a signed binary number?

  1. Rotates the bits without changing their count
  2. Multiplies by two and clears the sign bit
  3. Inverts every bit of the operand
  4. Divides by two and preserves the sign bit Correct answer.

Explanation

An arithmetic right shift replicates the sign bit into the vacated positions and shifts the magnitude right, which is equivalent to integer division by two for two's-complement values. Logical shifts and rotations behave differently.

Question 8Arithmetic Logic Unit Fundamentals

Which sub-circuit generates the propagate and generate signals used by a carry-lookahead adder?

  1. The carry generate/propagate logic Correct answer.
  2. The instruction decoder
  3. The memory controller
  4. The register file

Explanation

Carry-lookahead adders compute propagate and generate terms from the operand bits so carries can be derived in parallel rather than rippling. The other blocks are unrelated to carry computation.

Question 9Arithmetic Logic Unit Fundamentals

What is the result of adding the two 4-bit unsigned numbers 0110 and 0011?

  1. 1101
  2. 0101
  3. 0110
  4. 1001 Correct answer.

Explanation

0110 is 6 and 0011 is 3, so the sum is 9, which is 1001 in four-bit binary. The other options correspond to different arithmetic results.

Question 10Arithmetic Logic Unit Fundamentals

Using two's complement, what is the 4-bit representation of the decimal value -3?

  1. 1011
  2. 0011
  3. 1110
  4. 1101 Correct answer.

Explanation

The 4-bit representation of +3 is 0011; inverting gives 1100 and adding one gives 1101, which is -3 in two's complement. The other patterns represent different values.

Question 11Arithmetic Logic Unit Fundamentals

A 4-bit two's-complement adder computes 0111 + 0001. What does the result indicate?

  1. Correct sum of +8
  2. No overflow and a sum of -8
  3. Unsigned underflow
  4. Signed overflow Correct answer.

Explanation

Adding two positive numbers whose true sum (+8) exceeds the maximum positive 4-bit value (+7) produces a sign change, which is signed overflow. The carry into and out of the sign bit differ, confirming the overflow.

Question 12Arithmetic Logic Unit Fundamentals

Which expression gives the sum output of a full adder with inputs A, B, and Cin?

  1. A AND B AND Cin
  2. A XOR B XOR Cin Correct answer.
  3. (A OR B) AND Cin
  4. A XNOR B XNOR Cin

Explanation

The sum bit is the three-input exclusive-OR of the operands and the carry-in, since the parity of the number of ones determines the sum. The carry-out is the majority function of the three inputs.

Question 13Arithmetic Logic Unit Fundamentals

In a ripple-carry adder built from four full adders, why does the worst-case delay grow with word width?

  1. Each stage waits for the carry from the previous stage Correct answer.
  2. The operands must be converted to two's complement
  3. The clock frequency must be halved per stage
  4. Each stage waits for the sum of the next stage

Explanation

In a ripple-carry adder the carry-out of each stage feeds the carry-in of the next, so the final carry cannot settle until every preceding stage has resolved. This serial dependency is why wider words are slower.

Question 14Arithmetic Logic Unit Fundamentals

What advantage does a carry-lookahead adder offer over a ripple-carry adder?

  1. It uses fewer gate levels to resolve carries Correct answer.
  2. It supports floating-point arithmetic directly
  3. It stores intermediate sums in registers
  4. It eliminates the need for a carry-in bit

Explanation

Carry-lookahead logic computes carries from propagate and generate terms in parallel, reducing the depth of the carry chain compared with a serial ripple. It does not add storage, floating-point support, or remove the carry-in.

Question 15Arithmetic Logic Unit Fundamentals

An ALU control field selects the operation for an arithmetic logic unit. What is the purpose of this control signal?

  1. To set the clock period of the processor
  2. To choose which function the ALU performs Correct answer.
  3. To determine the memory address to fetch
  4. To specify the word width of the operands

Explanation

ALU control bits drive internal selection logic so the unit routes operands through the adder, logic gates, or shifter corresponding to the desired function. Word width, clock period, and addresses are set by other mechanisms.

Question 16Arithmetic Logic Unit Fundamentals

Which pair of conditions correctly detects signed overflow in an adder for operands A and B with result S?

  1. A and B are both zero, and S is one
  2. A and B have opposite signs, and S has the same sign as A
  3. A and B have the same sign, and S has the opposite sign Correct answer.
  4. A and B have opposite signs, and S is zero

Explanation

Signed overflow occurs when two operands of the same sign produce a result of the opposite sign, because the true magnitude exceeded the representable range. Opposite-sign operands cannot overflow in two's complement addition.

Question 17Arithmetic Logic Unit Fundamentals

What does a bitwise AND of 1100 and 1010 produce?

  1. 1000 Correct answer.
  2. 0110
  3. 1110
  4. 1101

Explanation

AND outputs 1 only where both operands have a 1, which occurs in the leftmost bit position, giving 1000. The other results correspond to OR, XOR, or an incorrect combination.

Question 18Arithmetic Logic Unit Fundamentals

Which operation is commonly used to clear selected bits of a register while leaving other bits unchanged?

  1. XOR with the register itself
  2. AND with a mask of zeros in the target positions Correct answer.
  3. OR with a mask of ones
  4. NOT applied to the entire register

Explanation

ANDing with a mask that has zeros in the positions to clear forces those bits to 0 while ones elsewhere preserve the original values. OR sets bits, XOR toggles, and NOT inverts everything.

Question 19Arithmetic Logic Unit Fundamentals

What is the effect of a logical left shift by one position on an unsigned binary value?

  1. It reverses the bit order of the value
  2. It sets the value to its bitwise complement
  3. It halves the value and shifts in a one
  4. It doubles the value and shifts in a zero Correct answer.

Explanation

A left shift moves each bit to a more significant position, multiplying the value by two, and a zero fills the least significant position. This holds until bits are shifted out of the word.

Question 20Arithmetic Logic Unit Fundamentals

Which component typically supplies the condition flags such as zero, carry, and overflow after an ALU operation?

  1. The bus arbiter
  2. The status register Correct answer.
  3. The instruction cache
  4. The program counter

Explanation

The status or condition-code register latches flags produced by the ALU so later conditional operations can test them. The other components handle addressing, instruction storage, and bus control.

Question 21Arithmetic Logic Unit Fundamentals

A comparator built from a subtractor determines that A > B for unsigned operands. Which condition supports this conclusion?

  1. The subtraction A - B produces no final borrow Correct answer.
  2. The subtraction A - B produces a final borrow
  3. The zero flag is set after A - B
  4. The operands have identical bit patterns

Explanation

For unsigned values, A > B exactly when subtracting B from A requires no borrow out of the most significant bit. A borrow indicates A < B, and a zero result indicates equality.

Question 22Arithmetic Logic Unit Fundamentals

Why does a barrel shifter produce a shift result in a single cycle while a serial shift register may require several?

  1. It converts the operand to a different number base first
  2. It uses multiplexers to route each input bit to its shifted position directly Correct answer.
  3. It stores the operand in a memory array before shifting
  4. It relies on the clock to propagate one bit per stage

Explanation

A barrel shifter is combinational selection logic: each output bit selects among possible input bits according to the shift amount, so the result settles without per-position clocking. Serial shifting moves one position per clock.

Question 23Arithmetic Logic Unit Fundamentals

In a carry-select adder, why are two candidate sums computed for each block?

  1. To compare the operands for equality at the same time
  2. To provide a redundant copy in case of a fault
  3. To allow the correct sum to be chosen once the block carry-in is known Correct answer.
  4. To reduce the number of gates required in the adder

Explanation

Each block precomputes results for both possible carry-in values, then a multiplexer selects the correct one when the incoming carry arrives. This trades extra hardware for a shorter critical path.

Question 24Arithmetic Logic Unit Fundamentals

A 4-bit ALU receives operands 1000 and 1000 with an ADD operation. For signed two's-complement interpretation, what is true of the result?

  1. The result underflows because the operands are negative
  2. The result overflows because two negative operands yield a nonnegative result Correct answer.
  3. The result is zero because the operands are equal
  4. The result is correct because the carry-out is one

Explanation

Both operands are -8, and their true sum -16 lies below the 4-bit minimum of -8, so the result wraps to a nonnegative pattern, which is signed overflow. A carry-out alone does not indicate signed correctness.

Question 25Arithmetic Logic Unit Fundamentals

Which statement best explains why subtraction is often implemented as addition of the two's complement in an ALU?

  1. It guarantees that overflow can never occur
  2. It lets a single adder circuit serve both addition and subtraction Correct answer.
  3. It converts the result into an unsigned representation
  4. It avoids the need for any control signals in the ALU

Explanation

Forming the two's complement of the subtrahend and adding reuses the same adder hardware, with control logic inverting the operand and setting the carry-in. This saves area compared with a dedicated subtractor.

Question 26Arithmetic Logic Unit Fundamentals

Which logic gate outputs 1 only when exactly one of its two inputs is 1?

  1. AND
  2. NOR
  3. Exclusive-OR Correct answer.
  4. NAND

Explanation

An exclusive-OR (XOR) gate produces a high output when the inputs differ, that is, when exactly one input is high. AND requires both inputs high, while NAND and NOR are inverted forms of AND and OR.

Question 27Arithmetic Logic Unit Fundamentals

How many select (control) inputs does a 4-to-1 multiplexer require?

  1. 4
  2. 1
  3. 2 Correct answer.
  4. 3

Explanation

A multiplexer with 2^n data inputs needs n select lines, since the select code must address each data input uniquely. For 4 data inputs, 2^2 = 4, so 2 select lines are needed.

Question 28Arithmetic Logic Unit Fundamentals

What is the decimal value of the unsigned binary number 1011?

  1. 11 Correct answer.
  2. 13
  3. 7
  4. 9

Explanation

Sum the place values of the set bits: 8 + 2 + 1 = 11. The bit positions correspond to powers of two from 2^3 down to 2^0.

Question 29Arithmetic Logic Unit Fundamentals

In a two's-complement representation with n bits, which range of signed integers can be represented?

  1. 0 to 2^n-1
  2. -2^(n-1) to 2^(n-1)-1 Correct answer.
  3. -2^n to 2^n-1
  4. -2^(n-1)+1 to 2^(n-1)

Explanation

Two's complement uses the most significant bit as a sign bit with weight -2^(n-1), giving one more negative value than positive values. The representable range is therefore -2^(n-1) through 2^(n-1)-1.

Question 30Arithmetic Logic Unit Fundamentals

A 3-input AND gate has inputs 1, 1, and 0. What is its output?

  1. 1
  2. It toggles
  3. Undefined
  4. 0 Correct answer.

Explanation

An AND gate outputs 1 only when every input is 1. Since one input is 0, the output is 0 regardless of the other inputs.

Question 31Arithmetic Logic Unit Fundamentals

Which Boolean identity correctly expresses De Morgan's theorem for the complement of a product?

  1. NOT(A AND B) = A OR B
  2. NOT(A AND B) = (NOT A) OR (NOT B) Correct answer.
  3. NOT(A AND B) = (NOT A) AND (NOT B)
  4. NOT(A OR B) = (NOT A) OR (NOT B)

Explanation

De Morgan's theorem states that the complement of a conjunction equals the disjunction of the complements. Complementing each input and swapping AND for OR preserves the function.

Question 32Arithmetic Logic Unit Fundamentals

How many 2-input multiplexers are needed to build a 4-to-1 multiplexer using a tree of 2-to-1 stages?

  1. 2
  2. 3 Correct answer.
  3. 4
  4. 6

Explanation

A tree structure uses two first-stage multiplexers to reduce four inputs to two, then one final multiplexer to select between them, for a total of three. Each 2-to-1 multiplexer halves the number of candidate signals.

Question 33Arithmetic Logic Unit Fundamentals

A 4-bit ALU performs a bitwise XOR of 1101 and 0110. What is the result?

  1. 1011 Correct answer.
  2. 1111
  3. 1001
  4. 0100

Explanation

XOR sets each output bit to 1 when the corresponding input bits differ. Comparing bit by bit gives 1, 0, 1, 1, which is 1011.

Question 34Arithmetic Logic Unit Fundamentals

A shifter rotates the 8-bit value 10010110 right by one position with the shifted-out bit re-entering at the left. What is the result?

  1. 01001010
  2. 01001011 Correct answer.
  3. 11001011
  4. 00010110

Explanation

A rotate moves every bit one place right and places the vacated leftmost position with the bit that fell off the right end, which is 0 here. The result is 01001011.

Question 35Arithmetic Logic Unit Fundamentals

What is the primary function of a decoder in a digital system?

  1. To store a single bit until the next clock edge
  2. To convert several data inputs into one output line
  3. To compare two binary values for equality
  4. To convert an n-bit input code into a unique active output line Correct answer.

Explanation

A decoder maps each distinct input code to exactly one asserted output line, which is useful for selecting registers or memory locations. It performs the inverse role of an encoder.

Question 36Arithmetic Logic Unit Fundamentals

A full adder receives A = 1, B = 1, and Cin = 1. What are the sum and carry-out?

  1. Sum = 1, carry-out = 0
  2. Sum = 1, carry-out = 1 Correct answer.
  3. Sum = 0, carry-out = 1
  4. Sum = 0, carry-out = 0

Explanation

The three inputs total 3 in decimal, which is binary 11. The least significant bit becomes the sum (1) and the higher bit becomes the carry-out (1).

Question 37Arithmetic Logic Unit Fundamentals

A 4-bit two's-complement value 1110 is arithmetically shifted left by one position. What is the result and its interpretation?

  1. 1100, representing -4 Correct answer.
  2. 0110, representing 6
  3. 1101, representing -3
  4. 1111, representing -1

Explanation

An arithmetic left shift moves bits toward the most significant end and fills the vacated low bit with 0, which multiplies the value by two when no overflow occurs. Shifting 1110 (-2) left gives 1100, which is -4.

Question 38Arithmetic Logic Unit Fundamentals

An ALU computes the bitwise OR of 1010 and 0110. What is the result?

  1. 1000
  2. 1100
  3. 1110 Correct answer.
  4. 0010

Explanation

Bitwise OR sets an output bit to 1 if either corresponding input bit is 1. Each position has at least one 1, giving 1110.

Question 39Arithmetic Logic Unit Fundamentals

A 4-bit ALU computes 0101 minus 0011 using two's-complement addition of the negated subtrahend. What is the result?

  1. 0010 Correct answer.
  2. 1000
  3. 0110
  4. 0001

Explanation

Subtraction adds the two's complement of 0011, which is 1101. Adding 0101 + 1101 and discarding the carry beyond four bits gives 0010, consistent with 5 - 3 = 2.

Question 40Arithmetic Logic Unit Fundamentals

A 4-bit ALU is given the operation code for logical right shift and the operand 1001. What is the output?

  1. 1100
  2. 1000
  3. 0100 Correct answer.
  4. 0101

Explanation

A logical right shift moves bits one place toward the least significant end and fills the vacated high position with 0, regardless of the sign bit. Shifting 1001 right logically yields 0100.

Question 41Number Systems and Data Representation

How many distinct values can be represented with 6 bits?

  1. 12
  2. 64 Correct answer.
  3. 32
  4. 128

Explanation

An n-bit field has 2^n distinct bit patterns. With n = 6, that gives 2^6 = 64 patterns.

Question 42Number Systems and Data Representation

What is the decimal value of the binary number 1011?

  1. 11 Correct answer.
  2. 13
  3. 15
  4. 9

Explanation

Each bit is weighted by a power of two from the right: 1+2+0+8 = 11. Only the bits in the 1, 2, and 8 positions are set.

Question 43Number Systems and Data Representation

Which hexadecimal digit represents the decimal value 12?

  1. D
  2. E
  3. C Correct answer.
  4. B

Explanation

Hexadecimal digits run 0-9 then A=10, B=11, C=12, D=13, E=14, F=15. The value 12 therefore maps to C.

Question 44Number Systems and Data Representation

What is the 8-bit two's complement representation of the decimal value -1?

  1. 01111111
  2. 11111110
  3. 11111111 Correct answer.
  4. 10000001

Explanation

Negating a value in two's complement means inverting all bits and adding one. Inverting 00000001 gives 11111110, and adding one yields 11111111.

Question 45Number Systems and Data Representation

In an unsigned binary representation, what does the most significant bit contribute?

  1. A sign flag for negative values
  2. A parity check bit
  3. The largest power-of-two weight Correct answer.
  4. The fractional part of the number

Explanation

In an unsigned number each bit carries a power-of-two weight, and the leftmost bit carries the largest weight. For an n-bit value that weight is 2^(n-1).

Question 46Number Systems and Data Representation

Which base does the octal number system use?

  1. 8 Correct answer.
  2. 2
  3. 10
  4. 16

Explanation

Octal is base 8, so each digit position is weighted by a power of 8 and digits range from 0 to 7.

Question 47Number Systems and Data Representation

What is the hexadecimal equivalent of the binary number 1111 0000?

  1. F0 Correct answer.
  2. E0
  3. FF
  4. 0F

Explanation

Each group of four binary bits maps directly to one hex digit. The high nibble 1111 is F and the low nibble 0000 is 0, giving F0.

Question 48Number Systems and Data Representation

What is the decimal value of the octal number 17?

  1. 23
  2. 17
  3. 15 Correct answer.
  4. 9

Explanation

In base 8 the digits are weighted 8 and 1, so 1×8 + 7×1 = 15.

Question 49Number Systems and Data Representation

What is the decimal value of the BCD encoding 0101 0110?

  1. 46
  2. 101
  3. 86
  4. 56 Correct answer.

Explanation

In packed BCD each nibble encodes one decimal digit. The nibbles 0101 and 0110 are 5 and 6, so the digits read 5 then 6, giving 56.

Question 50Number Systems and Data Representation

What is the 8-bit two's complement representation of -5?

  1. 11111010
  2. 10000101
  3. 11111011 Correct answer.
  4. 00000101

Explanation

Start with +5 = 00000101, invert the bits to get 11111010, then add one to obtain 11111011.