ALU 101 study plan
ALU 101 · Give each week a clear focus.
8 weeks · About 7 hours per week
Arithmetic Logic Unit Fundamentals & ALU Operations and Instruction-Level Behavior
Define the ALU's role in the CPU datapath and list the operations it must support
Trace a single add instruction from fetch through ALU execution to result write-back
Distinguish arithmetic, logical, and shift operations and state the flags each affects
Hand-compute the outputs and status flags for a small set of ADD/SUB/AND/OR examples
Your checkpoint
A one-page annotated ALU operation table listing 10 operations, their inputs, outputs, and affected flags, with worked examples for each
Arithmetic Logic Unit Fundamentals & ALU Operations and Instruction-Level Behavior
Derive how carry, overflow, zero, and sign flags are produced from operand and result bits
Compute overflow for signed addition and subtraction without relying on a calculator
Compare how the same ALU hardware handles signed and unsigned interpretation
Explain why overflow and carry differ and construct examples where exactly one is set
Your checkpoint
A 15-problem flag-prediction worksheet you author (with answer key) covering carry vs overflow edge cases
Number Systems and Data Representation & Arithmetic Logic Unit Fundamentals
Convert among binary, decimal, octal, and hexadecimal by hand with no errors on 20 conversions
Represent signed integers in sign-magnitude, ones' complement, and two's complement and convert between them
Compute the range of representable values for a given bit width in each signed format
Explain why two's complement makes addition hardware uniform across signed and unsigned values
Your checkpoint
A conversion and signed-representation cheat sheet plus a 20-item self-test with fully worked solutions
Number Systems and Data Representation & ALU Operations and Instruction-Level Behavior
Perform fixed-point addition and subtraction in two's complement and detect overflow from the result bits
Describe IEEE-754 single-precision layout and identify sign, exponent, and mantissa fields of given patterns
Articulate why integer ALUs and floating-point units differ in operation and flag behavior
Predict the effect of shift and rotate operations on sign, magnitude, and flags
Your checkpoint
A written half-page explanation of two's complement overflow detection with three worked bit-level examples, plus a shift/rotate flag table
Boolean Algebra and Logic Gates & Combinational and Sequential Logic
Write truth tables for 2- and 3-input Boolean functions and derive canonical sum-of-products forms
Apply De Morgan's laws and Boolean identities to simplify expressions and verify each step
Map simplified expressions to AND/OR/NOT/NAND/NOR gate diagrams
Build and read a Karnaugh map for 3- and 4-variable functions
Your checkpoint
A worked set of 6 Boolean simplifications, each shown from truth table through K-map to final gate-level expression
Combinational and Sequential Logic & Arithmetic Logic Unit Fundamentals
Design a 1-bit full adder from its truth table and cascade full adders into a ripple-carry adder
Explain carry propagation delay and contrast ripple-carry with carry-lookahead at a conceptual level
Construct a multiplexer-based ALU slice that selects among add, AND, OR, and NOT
Distinguish combinational from sequential behavior and identify which ALU-adjacent elements are sequential
Your checkpoint
A complete gate-level schematic of a 4-bit ripple-carry adder and a 1-bit 4-function ALU slice, with truth tables and a delay estimate
Datapath, Registers, and Control & ALU Operations and Instruction-Level Behavior
Diagram a simple datapath showing register file, ALU, and result write-back path
Trace instruction-level execution showing operand read, ALU operation, and register update
Explain how control signals select ALU operations and when status flags are latched
Describe the role of registers and program counter in sequencing ALU work
Your checkpoint
A labeled datapath diagram with a step-by-step trace of three instructions showing control signals and register values at each step
Arithmetic Logic Unit Fundamentals & ALU Operations and Instruction-Level Behavior & Datapath, Registers, and Control
Synthesize all domains into an integrated review covering operations, flags, representation, and datapath
Solve timed mixed-topic practice problems under exam-like constraints
Identify and remediate the two weakest areas revealed by practice performance
State confidently the flag outcomes and representation edge cases most commonly confused
Your checkpoint
A timed 40-question self-authored mock exam with answer key and a written remediation list of weak areas
Milestones
Week 2: Predict carry and overflow flags correctly on at least 12 of 15 self-authored cases without references
Week 4: Convert and range-check signed values across 8, 16, and 32 bits with zero errors on a 20-item self-test
Week 6: Produce a correct 4-bit ripple-carry adder schematic and verify its outputs against a truth table for all 256 input pairs
Week 8: Score at least 85% on the timed 40-question mock exam and document a remediation plan for missed items