ALU Operations and Instruction-Level Behavior
Operations mapped to instructions
Understand how assembly instructions drive the ALU: ADD, SUB, AND, OR, XOR, NOT, shifts, compares, and increments. Know that a compare is usually a subtraction whose result is discarded but whose flags are kept. Understand load/store and branch instructions as users of ALU results (address computation, condition testing).
Operand forms and effects
Know immediate, register, and memory operands, and how each reaches the ALU. Track which flags each instruction sets. Understand that shifts by a variable amount use a register, and that a shift by zero or by the word width has architecture-specific behavior. Recognize that multiply and divide may be multi-cycle or use dedicated hardware, and that division can raise a divide-by-zero exception.
Traps to watch
- Assuming a compare writes its result to a register - it usually only sets flags.
- Forgetting that some instructions leave flags unchanged (e.g., moves, loads on many ISAs).
- Confusing logical shift with rotate: rotate wraps bits around, shift discards them.
- Assuming branch conditions read the ALU result register rather than the flags.
- Overlooking that signed versus unsigned branches test different flags (sign/overflow versus carry).
Rule of thumb
Trace any instruction as: fetch operands → select ALU function → produce result and flags → write back or branch. If you can name each stage, you can predict the flags.
Worked example: CMP A, B where A = 5, B = 7 computes A - B = -2. Flags: zero = 0 (not equal), negative = 1, carry/borrow = 1 (unsigned A < B), overflow = 0. A signed "less than" branch uses negative XOR overflow = 1, so it is taken. Correct: 5 < 7.