ESECE study materials
ESECE study resources

ESECE study plan

ESECE · Give each week a clear focus.

8 weeks · About 6 hours per week

Week 1

Circuit Analysis and Network Theory

  • Derive and apply node-voltage and mesh-current equations for two-source networks with dependent sources, checking each solution by power balance

  • Compute Thevenin and Norton equivalents including source transformation and maximum power transfer conditions

  • Solve first- and second-order transient problems (RC, RL, RLC) for step and switched inputs using initial and final value reasoning

  • Convert between time-domain and phasor representations and compute impedance of series-parallel AC networks

Your checkpoint

A 20-problem worked set covering DC network theorems, transients, and sinusoidal steady state, with every answer verified by an independent method (power balance, superposition, or simulation)

Week 2

Circuit Analysis and Network Theory & Analog Electronics

  • Apply superposition, reciprocity, and two-port parameter conversions (Z, Y, h) to small networks

  • Analyze single-stage BJT and MOSFET amplifiers at midband to obtain gain, input resistance, and output resistance from a small-signal model

  • Design bias networks for a specified quiescent operating point and verify the operating region

  • Analyze ideal op-amp circuits including inverting, non-inverting, summing, and instrumentation configurations

Your checkpoint

A one-page design sheet for a biased common-emitter or common-source amplifier showing bias values, small-signal parameters, calculated gain and input/output resistance, plus a hand-drawn load line

Week 3

Analog Electronics & Digital Electronics and Logic Design

  • Determine frequency response of amplifier stages: midband gain, lower and upper cutoff, and gain-bandwidth tradeoff

  • Simplify Boolean expressions using Karnaugh maps up to five variables and implement the result in NAND-only form

  • Design combinational blocks (adder, comparator, multiplexer-based function) and verify against a truth table

  • Analyze sequential circuits: state diagrams, next-state tables, and timing constraints for flip-flop based designs

Your checkpoint

A complete combinational-plus-sequential design (for example a 4-bit up/down counter with a comparator output) documented with truth table, K-maps, minimized equations, and a state diagram

Week 4

Signals and Systems

  • Classify signals by energy, power, periodicity, and symmetry and compute the relevant metrics

  • Compute Fourier series coefficients for periodic waveforms and interpret the spectrum

  • Apply Fourier transform properties (scaling, shifting, convolution, differentiation) to derive transforms without direct integration where possible

  • Use Laplace transforms to solve linear circuit and system responses including initial conditions

  • Determine system properties: linearity, time invariance, causality, stability, and impulse-response behavior

Your checkpoint

A reference table of ten signals with their Fourier series or transform, plus worked derivations for three of them and a convolution example solved in both time and transform domains

Week 5

Signals and Systems & Electromagnetics and Transmission Lines

  • Apply the sampling theorem, compute aliasing outcomes, and analyze reconstruction and quantization error budgets

  • Use Maxwell's equations in integral form to justify boundary conditions at conductor and dielectric interfaces

  • Compute reflection and transmission coefficients, standing-wave ratio, and input impedance on lossless transmission lines

  • Locate impedance on a Smith chart and perform single-stub matching calculations

Your checkpoint

A transmission-line problem set including one full single-stub match worked numerically and verified on a Smith chart sketch, with SWR and bandwidth notes

Week 6

Electronic Devices and Semiconductor Physics & Communication Systems

  • Analyze PN-junction behavior: depletion region, built-in potential, diode equation, and temperature dependence

  • Determine BJT and MOSFET operating regions from terminal voltages and explain charge-control and threshold behavior

  • Compute link budgets: EIRP, free-space path loss, received power, and noise figure to carrier-to-noise ratio

  • Compare analog and digital modulation schemes on bandwidth efficiency and error performance using given formulas

Your checkpoint

A device-and-link summary sheet: one worked diode and one worked transistor bias problem, plus a satellite or terrestrial link budget carried from transmit power to Eb/N0

Week 7

Control Systems & Microprocessors and Embedded Systems

  • Derive closed-loop transfer functions and compute steady-state error for step, ramp, and parabolic inputs by system type

  • Sketch root loci and Bode plots to determine stability margins and crossover frequencies

  • Apply Routh-Hurwitz and Nyquist criteria to classify stability

  • Trace an interrupt-driven program on an 8-bit microcontroller: vector table, stack behavior, and timing

  • Map memory and I/O for a given address decoding scheme and identify the accessed region

Your checkpoint

A control-loop analysis report (transfer function, Routh array, Bode sketch, gain and phase margins) paired with a hand-traced interrupt service routine showing register and stack state at three checkpoints

Week 8

Power Systems and Electrical Machines & Circuit Analysis and Network Theory & Digital Electronics and Logic Design

  • Compute per-unit values and solve a balanced three-phase load or fault problem from a one-line diagram

  • Compare transformer, induction machine, and synchronous machine equivalent circuits and compute efficiency or slip

  • Complete two timed mixed-domain practice sets under exam pacing and log error causes by domain

  • Re-derive the five formulas most frequently missed, from memory, without notes

Your checkpoint

A timed 60-question mock scored by domain, with a written error log listing each missed concept, its root cause, and the corrected method

Milestones

Week 2: Solve a two-source network and a biased single-stage amplifier cold, within 15 minutes each, with correct units and no reference material

Week 4: Score at least 70 percent on a self-made 25-question set drawn from domains 1 through 4

Week 6: Complete a full link budget and a transistor bias calculation back-to-back without notes; both within 20 minutes total

Week 8: Achieve at least 75 percent overall on the timed mock with no single domain below 60 percent