CHSE Odisha Elective Electronics cheat sheet

Ohm's law: V = IR; power P = VI = I^2R = V^2/R for a resistor.

Series resistors: R_eq = R1 + R2 + ...; same current; voltage divides proportional to resistance.

Parallel resistors: 1/R_eq = 1/R1 + 1/R2 + ...; same voltage; branch currents divide inversely with resistance.

Capacitor: Q = CV, i = C dv/dt; energy = 1/2 CV^2; series capacitance uses reciprocal sum and parallel adds directly.

Inductor: v = L di/dt; energy = 1/2 LI^2; series inductors add and parallel inductors use reciprocal sum.

Reactance: X_C = 1/(2πfC), X_L = 2πfL; capacitor current leads voltage by 90°, inductor current lags by 90°.

RC/RL time constant: τ = RC or τ = L/R; one time constant reaches about 63.2% of final value.

KCL: sum of currents entering a node equals sum leaving; KVL: algebraic sum of voltages around a closed loop is zero.

Thevenin equivalent: V_th is open-circuit voltage, R_th is resistance looking back with sources deactivated; maximum power transfer occurs when R_L = R_th.

Intrinsic semiconductor: electrons and holes are equal; n-type doping adds donors, p-type doping adds acceptors.

PN junction: depletion region and barrier potential; forward bias lowers the barrier and narrows the region; reverse bias widens it.

Silicon barrier potential ≈0.7 V, germanium ≈0.3 V; diode forward drop in conduction is approximately these values.

Shockley equation: I = Is(exp(V/(nV_T)) - 1); V_T ≈26 mV at room temperature.

Ideal diode: forward short, reverse open; practical diode adds threshold voltage and bulk resistance.

Zener diode: reverse breakdown voltage is nearly constant; series resistor drops V_in - V_z and limits current.

Half-wave rectifier: V_dc = V_m/π, ripple frequency f; full-wave center-tap: V_dc = 2V_m/π, ripple frequency 2f.

Bridge rectifier uses four diodes and gives full-wave output without a center tap; diode pairs conduct on alternate half-cycles.

LED is forward biased to emit light; photodiode is reverse biased to produce photocurrent; varactor reverse bias varies capacitance.

BJT: I_E = I_B + I_C; α = I_C/I_E; β = I_C/I_B; β = α/(1 - α).

BJT active mode: BE junction forward biased, BC junction reverse biased; saturation: both forward; cutoff: both reverse.

Silicon V_BE ≈0.7 V in active mode; I_C = βI_B; transconductance g_m = I_C/V_T.

CE amplifier inverts and has high voltage and current gain; CB current gain is less than 1; CC emitter follower has voltage gain ≈1 and high input impedance.

Load line: V_CE = V_CC - I_C R_C; cutoff at V_CE = V_CC; saturation at I_C = V_CC/R_C.

JFET is voltage controlled with high input impedance; n-channel saturation current I_D = I_DSS(1 - V_GS/V_P)^2.

JFET cutoff occurs at or beyond pinch-off; for an n-channel device, V_GS ≤ V_P where V_P is negative.

Enhancement MOSFET conducts when |V_GS| > |V_th|; the insulated gate gives very high input resistance.

FET amplifier: common source inverts; common drain source follower is non-inverting with voltage gain below 1; common gate is non-inverting.

Voltage gain A_v = v_o/v_i; voltage gain in dB = 20 log|A_v|; power gain in dB = 10 log(P_o/P_i).

CE amplifier inverts the signal; coupling capacitors block DC; emitter bypass capacitor increases AC gain.

Negative feedback reduces gain by factor 1 + Aβ, increases bandwidth, reduces distortion, and changes input or output impedance depending on topology.

Ideal op-amp: infinite open-loop gain, infinite input impedance, zero output impedance; with negative feedback, V+ ≈ V- (virtual short).

Inverting op-amp: A_v = -R_f/R_in; non-inverting: A_v = 1 + R_f/R_1; voltage follower: A_v = 1.

Class A conducts for 360°, maximum efficiency 25% with resistive load; Class B conducts for 180°, maximum efficiency ≈78.5%.

Class AB biases both devices slightly on to reduce crossover distortion; push-pull uses complementary transistors.

Slew rate = maximum dV_o/dt; gain-bandwidth product is constant for an op-amp; CMRR = 20 log(A_d/A_cm).

Barkhausen criterion: |Aβ| = 1 and total loop phase shift = 360° (0°) at the oscillation frequency.

RC phase-shift oscillator: three RC sections give 180° plus amplifier inversion; f = 1/(2πRC√6) for equal sections.

Wien bridge oscillator: f = 1/(2πRC) for equal R and C; amplifier gain must be at least 3.

Hartley oscillator uses a tapped inductor and capacitor; Colpitts oscillator uses a tapped capacitor and inductor; both are LC oscillators.

Crystal oscillator has very high Q and stable frequency; series and parallel resonant modes are close together.

Astable multivibrator has no stable state; monostable has one stable state and one trigger-produced pulse; bistable has two stable states.

Op-amp integrator uses capacitor feedback; differentiator uses capacitor input; both are wave-shaping circuits.

RC low-pass and high-pass cutoff frequency: f_c = 1/(2πRC).

Schmitt trigger uses positive feedback and hysteresis to clean noisy signals; clipper limits peaks; clamper shifts DC level.

Transformer: V_s/V_p = N_s/N_p; step-down has N_s < N_p; ideal power input equals power output.

Half-wave rectifier ripple frequency is f; full-wave and bridge rectifier ripple frequency is 2f.

Ripple factor = V_r(rms)/V_dc; ideal half-wave ≈1.21; ideal full-wave ≈0.48.

Capacitor filter reduces ripple and raises average DC output; larger C or load resistance gives smaller ripple.

Percent regulation = (V_no-load - V_full-load)/V_full-load × 100%; lower values indicate better regulation.

Zener shunt regulator: R_s = (V_in - V_z)/(I_z + I_L); the Zener must remain reverse biased.

Series pass regulator uses a control transistor in series; shunt regulator shunts excess current; both reduce output variation.

78xx gives fixed positive output, 79xx gives fixed negative output; 7805 output is 5 V; dropout voltage limits minimum input.

SMPS switches at high frequency for high efficiency; buck converter steps down and boost converter steps up.

Binary-to-decimal: each bit has weight 2^n; BCD uses four bits per decimal digit.

AND output is 1 only if all inputs are 1; OR output is 1 if any input is 1; NOT inverts; NAND and NOR are universal gates.

XOR output is 1 for an odd number of 1 inputs; XNOR is its complement.

De Morgan: (A·B)' = A' + B'; (A + B)' = A'·B'.

Half adder: Sum = A⊕B, Carry = A·B; full adder adds A, B, and carry-in.

JK flip-flop toggles when J = K = 1; D flip-flop output follows D at the clock edge; T flip-flop toggles when T = 1.

n-bit ripple counter has modulus up to 2^n; decade counter has modulus 10; synchronous counters clock all flip-flops together.

Multiplexer 2^n:1 selects one input using n select lines; decoder n-to-2^n; encoder performs the reverse.

ADC resolution = V_ref/2^n for an n-bit converter; sampling theorem requires f_s ≥ 2f_max.

Modulation places baseband information on a carrier; AM varies amplitude, FM varies frequency, PM varies phase.

AM modulation index m = V_m/V_c; for undistorted AM, 0 ≤ m ≤ 1.

AM bandwidth = 2f_m; AM total power P_t = P_c(1 + m^2/2) for sinusoidal modulation.

FM modulation index β = Δf/f_m; Carson bandwidth ≈ 2(Δf + f_m); FM has constant amplitude and better noise immunity.

Superheterodyne receiver mixes incoming signal with a local oscillator to a fixed intermediate frequency.

Sampling theorem: f_s ≥ 2f_max; quantization error decreases with more bits; PCM encodes quantized samples in binary.

Digital modulation: ASK varies amplitude, FSK varies frequency, PSK varies phase; QAM combines amplitude and phase.

Shannon capacity C = B log2(1 + S/N); SNR in dB = 10 log10(P_s/P_n).

AM detection commonly uses an envelope detector; FM detection uses a discriminator or ratio detector.

PMMC meter responds to average current and measures DC; moving-iron meter responds to RMS and can measure AC and DC.

Ammeter is connected in series and has low resistance; voltmeter is connected in parallel and has high resistance.

Meter loading effect: low voltmeter resistance or high ammeter resistance changes the circuit being measured and causes error.

CRO time base: period = time/div × horizontal divisions; frequency = 1/period; amplitude = volts/div × vertical divisions.

Wheatstone bridge at balance has zero detector current; arm resistance ratios satisfy R1/R2 = R3/Rx.

Active transducer generates electrical output from a physical input, such as a thermocouple or piezoelectric device; passive transducer needs excitation, such as an RTD or strain gauge.

NTC thermistor resistance falls with temperature; RTD resistance rises with temperature; strain gauge resistance changes with strain.

LVDT measures linear displacement; Bourdon tube measures pressure; photodiode converts light to current.