CHSE Odisha Elective Electronics common mistakes
CHSE Odisha Elective Electronics · Understand the traps and how to avoid them.
When a circuit has R2 in series with the parallel pair R3||R4, the candidate computes R2||(R3+R4) or simply adds all four resistance values because the network was not redrawn at its nodes.
The resistor symbol is pattern-matched instead of checking whether components share the same current (series) or the same two nodes (parallel).
What to do instead
Label every node, redraw the network, and simplify from the innermost parallel group outward. Verify each step by asking whether the same current must flow through both elements or whether they share the same voltage.
Assuming a diode is forward-biased in every branch and subtracting a 0.7 V drop, even in branches where the assumed current would flow from cathode to anode.
A single diode model is memorized and the assumed conducting state is never checked for consistency.
What to do instead
Use assumed-state analysis: assume on or off, solve the circuit, then verify current direction and voltage polarity. A reverse-biased diode is open; use about 0.7 V for Si, 0.3 V for Ge, and 0 V for an ideal diode when forward-biased.
Designing a Zener regulator with Rs=(Vin−Vz)/IL(max) only, leaving no guaranteed Zener current at minimum input and no margin at maximum input.
The Zener is treated as a fixed clamp and the need for a minimum Zener current while the series resistor carries both load and Zener current is forgotten.
What to do instead
Set Is=IL+IZ. Ensure Rs is no greater than (Vin(min)−Vz)/(IL(max)+IZ(min)) and no less than (Vin(max)−Vz)/(IL(min)+IZ(max)); then check Zener power PZ=VzIZ and resistor power.
Solving every transistor bias point with IC=βIB, including a JFET or MOSFET gate loop, or reporting a negative VCE for a saturated BJT.
One BJT current-gain model is overgeneralized; β is treated as a fixed design constant and the FET gate is treated like a forward-biased base.
What to do instead
Identify the device first. For a FET, use IG≈0 and find ID from VGS; for a BJT, check the load line. If the calculated VCE is below VCE(sat), use the saturation model IC≈(VCC−VCE(sat))/RC and recognize excess base current.
Writing closed-loop gain as A/(1+Aβ) without deciding whether the feedback is negative or what β samples and mixes, then substituting β in volts or amperes.
The formula is memorized without the feedback topology, so the sign and dimensions of the feedback factor are ignored.
What to do instead
Identify series or shunt mixing at the input and voltage or current sampling at the output. Assign the correct dimensions to β, determine the loop gain T=Aβ with its sign, and use 1+T in the denominator only for negative feedback.
Stating the Barkhausen criterion as Aβ>1 alone, or claiming a three-section RC phase-shift oscillator needs 60° per section without accounting for the amplifier's 180°.
The gain condition is emphasized while the simultaneous phase condition is ignored.
What to do instead
At sustained oscillation the loop gain magnitude is 1 and the total phase shift is 0° or 360°. Start with magnitude >1 and use amplitude limiting. An RC network gives 180°, the amplifier gives 180°, and each RC section is near 60° at the oscillation frequency.
Using 50 Hz ripple frequency for a half-wave rectifier on a 50 Hz supply and 50 Hz for a full-wave rectifier.
The AC input cycles are counted instead of the rectified output pulses.
What to do instead
For a 50 Hz line, half-wave ripple is 50 Hz, while full-wave and bridge ripple are 100 Hz. Use the correct ripple frequency in filter-capacitor and ripple-voltage calculations.
Converting an AND-OR circuit to NAND-only by replacing each AND gate with a NAND and each OR gate with a NAND while leaving input bubbles unchanged.
De Morgan's laws and gate equivalences are ignored; the conversion is done by shape rather than by Boolean function.
What to do instead
Apply De Morgan, push bubbles, and invert inputs where needed. Verify the final NAND-only circuit with a truth table or Boolean expression, not by visual substitution alone.
For AM with modulation index m, computing total power as Pc(1+m) or sideband width as fm instead of Pc(1+m²/2) and 2fm.
Peak envelope amplitude is confused with power, and message frequency is confused with transmission bandwidth.
What to do instead
Use Ptotal=Pc(1+m²/2), Psidebands=Pc m²/2, and place two sidebands at fc±fm. The bandwidth is 2fm, and m must not exceed 1 for undistorted AM.
Connecting an ammeter across a component or a voltmeter in series with the load, then interpreting the wrong reading as a faulty circuit.
Meters look similar and the terminal markings, range, and correct series/parallel connection are not checked before power is applied.
What to do instead
Connect an ammeter in series with low resistance and a voltmeter in parallel with high resistance. Select the range and polarity before connection, and consider meter loading when measuring high-resistance circuits.