ISRO Scientist/Engineer SC (Electronics) cheat sheet

Diode current: I = I_s (e^(V/(nV_T)) − 1), V_T = kT/q ≈ 26 mV at 300 K; n ≈ 1 for Ge, 2 for Si at low currents.

BJT active-region relations: I_C = β I_B = α I_E, α = β/(β+1); g_m = I_C/V_T; r_π = β/g_m; r_o = V_A/I_C.

MOSFET saturation: I_D = ½ μ_n C_ox (W/L)(V_GS − V_th)²(1+λV_DS); triode: I_D = μ_n C_ox (W/L)[(V_GS−V_th)V_DS − V_DS²/2].

Thermal voltage V_T = kT/q; k = 1.38×10⁻²³ J/K, q = 1.6×10⁻¹⁹ C; V_T ≈ 25.9 mV at 300 K.

Zener diode regulates in reverse breakdown; series resistor R = (V_in − V_Z)/(I_Z + I_L).

Half-wave rectifier: V_dc = V_m/π, ripple factor r = 1.21; full-wave: V_dc = 2V_m/π, r = 0.482.

Small-signal hybrid-π model: input resistance r_π, output resistance r_o, transconductance g_m; voltage gain A_v = −g_m(r_o∥R_L).

PN junction depletion width W = √(2ε(V_bi − V)/q (1/N_A + 1/N_D)); built-in potential V_bi = V_T ln(N_A N_D/n_i²).

Ideal op-amp: infinite open-loop gain, infinite input impedance, zero output impedance; virtual short V₊ = V₋ in negative feedback.

Inverting amplifier gain A_v = −R_f/R_in; non-inverting A_v = 1 + R_f/R₁; integrator V_o = −(1/RC)∫V_i dt; differentiator V_o = −RC dV_i/dt.

Instrumentation amplifier CMRR set by resistor matching; three-op-amp topology gives high input impedance and adjustable gain via one resistor.

Barkhausen criterion for oscillation: loop gain |Aβ| = 1 and phase shift 360° (or 0°) at oscillation frequency.

RC phase-shift oscillator frequency f = 1/(2πRC√6) with three identical RC sections; Wien bridge f = 1/(2πRC).

Class A efficiency ≤ 25% (resistive load), 50% (transformer coupled); Class B push-pull ≤ 78.5%; Class AB reduces crossover distortion.

Active filters: Sallen-Key and multiple-feedback topologies; cutoff f_c = 1/(2πRC) for first-order RC; Q and damping set by component ratios.

PLL lock range and capture range; charge-pump PLL loop filter sets damping factor ζ and natural frequency ω_n.

Boolean identities: A + A'B = A + B; A + AB = A; De Morgan: (A+B)' = A'B', (AB)' = A' + B'.

Karnaugh map grouping: groups of 1, 2, 4, 8, 16 adjacent cells; largest groups give minimal SOP; don't-cares may be grouped for simplification.

Flip-flop setup and hold times: data must be stable t_su before and t_h after active clock edge; propagation delay t_pd limits maximum clock frequency.

Maximum clock frequency f_max = 1/(t_pd,FF + t_logic + t_su).

Johnson counter (twisted-ring) with n flip-flops has 2n states; ring counter has n states.

Race-around condition in JK flip-flop when clock pulse width T > 2t_pd; master-slave JK eliminates it.

CMOS static power is negligible; dynamic power P = α C V_DD² f, where α is activity factor.

Setup/hold violations cause metastability; synchronizers (two flip-flops) reduce MTBF failures.

Fourier transform pair: x(t) = (1/2π)∫X(jω)e^(jωt)dω; X(jω) = ∫x(t)e^(−jωt)dt; convolution in time = multiplication in frequency.

Laplace transform: L{e^(−at)u(t)} = 1/(s+a); final value theorem lim_{t→∞} x(t) = lim_{s→0} sX(s) if poles in left half-plane.

Sampling theorem: f_s > 2 f_max to avoid aliasing; reconstruction filter cutoff at f_s/2.

Z-transform: Z{a^n u[n]} = z/(z−a), ROC |z| > |a|; stability requires ROC include unit circle.

LTI system stability: all poles in left half s-plane (continuous) or inside unit circle (discrete); BIBO stability.

Parseval's theorem: energy = ∫|x(t)|²dt = (1/2π)∫|X(jω)|²dω; power spectral density relates autocorrelation and spectrum.

DFT: X[k] = Σ_{n=0}^{N−1} x[n] e^(−j2πkn/N); FFT reduces complexity from O(N²) to O(N log₂ N).

Group delay τ_g = −dφ(ω)/dω; linear phase implies constant group delay and no dispersion.

AM: s(t) = A_c[1 + m(t)]cos(2πf_c t); modulation index μ = A_m/A_c; bandwidth = 2f_m; power efficiency η = μ²/(2+μ²).

FM: Carson's rule B ≈ 2(Δf + f_m); modulation index β = Δf/f_m; FM improves SNR via capture effect and threshold extension.

Superheterodyne receiver: image frequency f_image = f_LO + f_IF = f_c + 2f_IF (high-side injection).

Digital modulation: BPSK BER = Q(√(2E_b/N₀)); QPSK same BER with double spectral efficiency; M-QAM requires higher SNR.

Shannon capacity C = B log₂(1 + S/N) bits/s; channel coding approaches capacity with large block lengths.

PCM: bit rate R_b = f_s × n; quantization SNR ≈ 6.02n + 1.76 dB for full-scale sinusoid.

Matched filter maximizes output SNR at sampling instant; impulse response h(t) = s(T − t).

Nyquist minimum bandwidth for ISI-free transmission: W = R_s/2 for real baseband; raised-cosine roll-off α trades bandwidth for timing tolerance.

Maxwell's equations: ∇×E = −∂B/∂t; ∇×H = J + ∂D/∂t; ∇·D = ρ; ∇·B = 0.

Wave equation in free space: ∇²E − μ₀ε₀ ∂²E/∂t² = 0; phase velocity c = 1/√(μ₀ε₀) ≈ 3×10⁸ m/s.

Intrinsic impedance η = √(μ/ε); free space η₀ ≈ 377 Ω; reflection coefficient Γ = (η₂−η₁)/(η₂+η₁).

Poynting vector S = E × H (W/m²); time-average power density = ½ Re(E × H*).

Transmission line: characteristic impedance Z₀ = √(L/C); propagation constant γ = α + jβ = √((R+jωL)(G+jωC)).

VSWR = (1+|Γ|)/(1−|Γ|); return loss RL = −20 log₁₀|Γ| dB; matched load Γ = 0.

Smith chart: normalized impedance z = Z/Z₀; one full rotation = λ/2; VSWR circle centered at chart center.

Boundary conditions: tangential E and normal B continuous; tangential H continuous unless surface current; normal D discontinuous by surface charge.

Half-wave dipole: length ≈ λ/2, input impedance ≈ 73 + j42.5 Ω, directivity 1.64 (2.15 dBi), HPBW ≈ 78°.

Friis transmission equation: P_r/P_t = G_t G_r (λ/(4πR))²; path loss increases with frequency squared.

Antenna gain G = η_rad D; effective aperture A_e = λ²D/(4π); for short dipole D = 1.5, for half-wave dipole D = 1.64.

Array factor for uniform N-element linear array: AF = sin(Nψ/2)/(N sin(ψ/2)), ψ = kd cosθ + β; grating lobes when d ≥ λ.

Microstrip patch resonant length L ≈ c/(2f√ε_eff) − 2ΔL; ε_eff depends on substrate height and permittivity.

Rectangular waveguide cutoff f_c = (c/2)√((m/a)² + (n/b)²); dominant mode TE₁₀ with f_c = c/(2a).

Magic tee: E-arm and H-arm isolation; S-matrix of ideal directional coupler has matched ports and directivity.

Radar range equation: R_max = [(P_t G² λ² σ)/((4π)³ P_min)]^(1/4); minimum detectable signal sets sensitivity.

Second-order system: ω_n natural frequency, ζ damping ratio; overshoot %OS = 100 e^(−ζπ/√(1−ζ²)); settling time t_s ≈ 4/(ζω_n) for 2% band.

Routh-Hurwitz criterion: number of sign changes in first column equals number of right-half-plane poles; necessary condition all coefficients positive.

Bode plot: gain margin = −20 log|G(jω_pc)| where phase = −180°; phase margin = 180° + ∠G(jω_gc) where |G| = 1.

Nyquist stability criterion: N = Z − P; encirclements of −1 point relate closed-loop RHP poles to open-loop RHP poles.

PID controller: u(t) = K_p e + K_i ∫e dt + K_d de/dt; integral action eliminates steady-state error, derivative adds damping.

Steady-state error: type 0 system step input e_ss = 1/(1+K_p); type 1 ramp e_ss = 1/K_v; type 2 parabolic e_ss = 1/K_a.

State-space: ẋ = Ax + Bu, y = Cx + Du; controllability matrix [B AB ... A^(n−1)B] full rank; observability matrix [C; CA; ...] full rank.

Root locus: branches start at open-loop poles and end at zeros or infinity; asymptote angles = (2k+1)180°/(n−m).

8085: 8-bit data bus, 16-bit address bus, 40-pin DIP, clock 3 MHz; registers A, B, C, D, E, H, L, SP, PC.

8086: 16-bit data bus, 20-bit address bus, 1 MB memory; segmented addressing CS:IP, DS:SI; minimum/maximum modes.

8051: 8-bit microcontroller, 4 KB ROM, 128 bytes RAM, 32 I/O lines, two 16-bit timers, full-duplex UART, 5 interrupt sources.

ARM Cortex-M: Thumb-2 instruction set, NVIC nested vectored interrupt controller, 32-bit registers R0–R15, SP and LR.

Interrupt latency: time from interrupt request to first instruction of ISR; includes context save and vector fetch.

Memory-mapped I/O vs port-mapped I/O; volatile keyword prevents compiler optimization of hardware registers.

Watchdog timer resets MCU if firmware fails to refresh within timeout; independent clock source improves reliability.

Embedded C: bitwise operations for register manipulation; static analysis and MISRA C guidelines for safety-critical code.

Amdahl's law: speedup = 1/((1−f) + f/s); limited by serial fraction.

Cache: average access time = hit time + miss rate × miss penalty; direct-mapped, set-associative, fully associative; LRU replacement.

Pipelining: ideal CPI = 1; hazards structural, data, control; forwarding and stalling resolve data hazards.

OSI seven layers: physical, data link, network, transport, session, presentation, application; TCP/IP four-layer model.

IPv4 address 32 bits; IPv6 128 bits; subnet mask determines network and host portions; CIDR notation /n.

TCP: connection-oriented, reliable, flow control via sliding window, congestion control (slow start, AIMD); UDP connectionless.

Ethernet CSMA/CD; switched LAN uses MAC address table; ARP resolves IP to MAC; DNS resolves names to IP.

CRC error detection: polynomial division; Hamming distance d detects d−1 errors and corrects ⌊(d−1)/2⌋ errors.

Wheatstone bridge balance: R₁/R₂ = R₃/R₄; sensitivity maximized when all arms comparable; used for strain gauges and RTDs.

Instrumentation amplifier CMRR > 100 dB; used for low-level transducer signals; guard shields reduce common-mode noise.

ADC resolution: LSB = V_ref/2^n; quantization error ±½ LSB; SNR ≈ 6.02n + 1.76 dB for full-scale sine.

Sample-and-hold circuit aperture time and droop rate limit maximum input frequency; anti-alias filter before ADC.

Spacecraft bus: power (solar array, battery), data (MIL-STD-1553, SpaceWire, CAN), attitude control (reaction wheels, star trackers).

Radiation effects: total ionizing dose (TID), single-event upset (SEU), latch-up; mitigation by shielding, EDAC, watchdog.

Telemetry and telecommand: PCM encoding, convolutional coding, Reed-Solomon; link budget includes EIRP, path loss, G/T.

Thermal vacuum testing and vibration testing qualify spacecraft hardware for launch and space environment.