Microprocessors, Microcontrollers and Embedded Systems
Microprocessors, Microcontrollers and Embedded Systems tests architecture, addressing modes, interrupts, timers, memory interfacing and basic embedded design.
Core rules
- 8085: 8-bit data, 16-bit address, multiplexed AD0–AD7; ALE latches the low address byte. Interrupt vectors include RST 7.5 at 003Ch and TRAP at 0024h.
- 8051: 8-bit CPU, 4 KB on-chip ROM in the classic part, 128 B RAM, two timers and five interrupt sources. Timer mode 1 is 16-bit; reload = 65536 − count.
- Addressing modes: immediate, direct, indirect, register and indexed. MOV works in internal RAM; MOVX accesses external data memory.
- Interrupts have priority and vector addresses; edge-triggered flags may need clearing in the service routine.
- Memory-mapped I/O uses normal load/store instructions; port-mapped I/O uses special instructions.
- Watchdog timers recover from lock-ups; ISRs should be short and defer work to the main loop.
Worked example
An 8051 runs from a 12 MHz crystal. Its machine cycle is 12 clock periods, so one machine cycle = 1 µs. To generate a 1 ms delay with Timer 0 in mode 1, the count needed is 1000. Reload = 65536 − 1000 = 64536 = FC18H. Load TH0 = FCH and TL0 = 18H. The timer overflows after 1000 counts, setting TF0. Polling or an interrupt then toggles the output; two delays give a 2 ms period.
Traps
- Forgetting the 12-clock machine cycle on the classic 8051.
- Loading the count instead of the reload value.
- Confusing interrupt vector addresses with subroutine addresses.
- Using MOV instead of MOVX for external memory.
- Not clearing timer or serial flags in software.