FE Electrical & Computer cheat sheet

Two's complement: negate by inverting all bits and adding 1; an n-bit signed range is -2^(n-1) to 2^(n-1)-1, and overflow occurs only when two operands of the same sign produce a result of the opposite sign.

Boolean identities: A + A'B = A + B, A + AB = A, De Morgan: (AB)' = A' + B' and (A+B)' = A'B'; NAND and NOR are each functionally complete.

Setup/hold: flip-flop data must be stable for t_su before and t_h after the active clock edge; the max clock frequency is set by t_clk >= t_cq + t_logic + t_su, and hold requires t_cq + t_logic(min) >= t_h.

Karnaugh grouping uses power-of-two groups of 1s (1, 2, 4, 8...), groups may wrap across edges, and the minimal SOP is the smallest set of largest groups covering every 1 at least once.

Cache: average access time = hit_time + miss_rate x miss_penalty; direct-mapped address splits into tag | index | offset, with offset bits = log2(block size) and index bits = log2(number of sets).

Pipeline speedup is bounded by the slowest stage plus register overhead: ideal speedup ~ number of stages, but speedup = T_sequential / (k x t_stage + (k-1) x t_reg) for k stages.

Amdahl's law: speedup = 1 / ((1 - f) + f/s), where f is the fraction improved and s the improvement factor; the serial fraction caps the achievable gain.

RISC vs CISC: RISC uses fixed-length instructions, load/store architecture, and single-cycle simple operations; CISC allows variable-length instructions and memory operands in arithmetic.

OSI/TCP-IP mapping: application (HTTP, DNS, SMTP), transport (TCP, UDP), internet (IP, ICMP, ARP), link (Ethernet); TCP is connection-oriented with sliding-window flow control, UDP is connectionless with no retransmission.

Ideal op-amp: infinite open-loop gain, infinite input impedance, zero output impedance; with negative feedback the summing-point constraint gives V+ = V- and I_in = 0.

Thevenin/Norton: V_th is the open-circuit output, R_th is V_oc/I_sc, and maximum power transfer to a load occurs at R_L = R_th, delivering P = V_th^2 / (4 R_th).

RC step response: v(t) = v_final + (v_initial - v_final)e^(-t/tau), tau = RC; after one tau the change is 63.2% complete, after five tau it is 99.3% complete.

RLC second order: s^2 + (R/L)s + 1/(LC) for series; omega_0 = 1/sqrt(LC), damping ratio zeta = (R/2)sqrt(C/L); zeta < 1 underdamped, = 1 critically damped, > 1 overdamped.

Bode rules: a single pole breaks at -20 dB/decade and contributes -45 degrees at the corner, -90 degrees a decade above; a zero adds +20 dB/decade and +90 degrees.

Diode models: constant-drop (0.7 V Si, 0.3 V Ge) for forward conduction; a Zener regulates when reverse-biased beyond V_Z, and a forward-biased diode clamps a node near 0.7 V.

BJT regions: cutoff (V_BE < 0.7 V), active (I_C = beta I_B, base-emitter forward, collector-base reverse), saturation (both junctions forward, V_CE ~ 0.2 V); beta = I_C/I_B and alpha = beta/(beta+1).

MOSFET: in saturation I_D = (1/2) k_n' (W/L)(V_GS - V_th)^2; in triode I_D = k_n'(W/L)[(V_GS - V_th)V_DS - V_DS^2/2]; cutoff when V_GS < V_th.

Sampling and noise: Nyquist requires f_s > 2 f_max to avoid aliasing; thermal noise power is kTB, and for a resistor the noise density is sqrt(4kTR) V/sqrt(Hz).

Three-phase: V_L = sqrt(3) V_phase for wye, I_L = I_phase for wye, I_L = sqrt(3) I_phase for delta; total real power P = sqrt(3) V_L I_L cos(theta).

Per-unit: divide by base values; Z_base = V_base^2 / S_base, I_base = S_base / (sqrt(3) V_base) for three-phase, and per-unit impedance is unchanged when referred across a transformer.

Transformer: turns ratio a = N1/N2 = V1/V2; referred impedance scales by a^2, and the equivalent series impedance is found from the short-circuit test while core loss comes from the open-circuit test.

Induction motor: synchronous speed n_s = 120 f / p, slip s = (n_s - n_r)/n_s, rotor frequency = s f; developed torque is proportional to air-gap power divided by synchronous speed.

Power factor correction: Q_c = P (tan(theta_1) - tan(theta_2)), and the capacitance for a delta bank is C = Q_c / (3 x 2 pi f x V_L^2).

Symmetrical components: positive, negative, and zero sequences; zero-sequence currents flow only in grounded-wye paths, and a balanced set has only positive sequence.

Transmission line: surge impedance Z_c = sqrt(L/C), and SIL = V_L^2 / Z_c; a short line is modeled by series impedance, a medium line by nominal pi, a long line by distributed parameters.

Protection: an overcurrent relay coordinates by time-current curves with the downstream device faster; a distance relay zones roughly 80-85% (Zone 1), 120-150% (Zone 2), and beyond (Zone 3).

Generator and motor efficiency: eta = P_out/P_in; losses include copper (I^2R), core, friction and windage, and stray load, and synchronous reactance sets voltage regulation.