FE Electrical & Computer flashcards

32 cards. Read the term and the definition here. The deck at the top of this page is optional.

Two's complement negation

Invert every bit of the n-bit value and add one. The result represents the negative of the original number, and the representable signed range is -2^(n-1) through 2^(n-1)-1.

De Morgan's theorems

The complement of a product equals the sum of the complements, and the complement of a sum equals the product of the complements. These identities convert between AND/OR forms and enable NAND-only or NOR-only logic.

Karnaugh map grouping rule

Combine adjacent 1-cells in groups of 1, 2, 4, 8, and so on, allowing wrap-around at map edges. Choose the fewest, largest groups covering all 1s to obtain the minimal sum-of-products expression.

Setup and hold constraints

Data must be stable before the clock edge for the setup time and after it for the hold time. The clock period must exceed clock-to-output delay plus combinational delay plus setup time.

Direct-mapped cache address

The address splits into tag, index, and block offset. Offset width equals log2 of block size in bytes, index width equals log2 of the number of sets, and the tag occupies the remaining high bits.

Amdahl's law

Speedup equals one divided by the sum of the unimproved fraction and the improved fraction divided by its speedup factor. A large serial fraction limits the achievable overall gain regardless of parallel width.

Pipeline speedup limit

Ideal k-stage pipelining approaches a k-fold speedup, but register overhead and pipeline stalls reduce it. Actual speedup equals sequential time divided by the sum of stage time and register delay per stage.

RISC versus CISC

RISC uses fixed-length instructions, load/store memory access, and simple single-cycle operations. CISC permits variable-length instructions and memory operands inside arithmetic instructions, trading decode complexity for code density.

TCP versus UDP

TCP is connection-oriented, acknowledges segments, retransmits losses, and applies sliding-window flow control. UDP is connectionless with no acknowledgment or retransmission, giving lower latency for streaming and query traffic.

Op-amp summing-point constraint

With negative feedback and ideal infinite gain, the differential input voltage is forced to zero and no current enters either input. This yields V-plus equals V-minus and enables node analysis of amplifier circuits.

Thevenin equivalent resistance

The Thevenin resistance equals the open-circuit voltage divided by the short-circuit current. It also equals the resistance seen at the terminals with all independent sources deactivated (voltage sources shorted, current sources opened).

Maximum power transfer

A source delivers maximum power to a load when the load resistance equals the Thevenin resistance. The delivered power is then the square of the Thevenin voltage divided by four times that resistance.

RC time constant response

The time constant equals resistance times capacitance. Voltage or current changes exponentially toward its final value, completing 63.2 percent of the change in one time constant and 99.3 percent in five.

Series RLC damping ratio

The damping ratio equals half the resistance divided by the characteristic impedance, or (R/2) times the square root of C over L. Below one the circuit is underdamped; above one it is overdamped.

Bode pole asymptote

A single pole bends the magnitude plot to minus 20 decibels per decade above the corner frequency. Its phase contribution is minus 45 degrees at the corner and approaches minus 90 degrees a decade higher.

Zener diode regulation

A Zener diode operated reverse-biased beyond its breakdown voltage holds a nearly constant terminal voltage. It is placed in parallel with the load, with a series resistor dropping the excess supply voltage.

BJT saturation condition

In saturation both junctions are forward biased and the collector-emitter voltage falls to roughly 0.2 volts. Collector current is then limited by the external circuit rather than by base current times beta.

MOSFET saturation current

In saturation the drain current equals half the transconductance parameter times the square of the gate-source overdrive voltage. Saturation requires the drain-source voltage to exceed the overdrive.

Nyquist sampling criterion

A signal must be sampled at more than twice its highest frequency component to be reconstructed without aliasing. Sampling at exactly twice the highest frequency is the theoretical minimum limit.

Resistor thermal noise

A resistor produces white thermal noise with power spectral density of four kTR volts squared per hertz. Available noise power over bandwidth B equals kTB, independent of the resistance value.

Three-phase power formula

Total real power equals the square root of three times line voltage times line current times power factor. Reactive power uses the sine of the angle, and apparent power omits the angle term.

Per-unit base impedance

Base impedance equals base voltage squared divided by base volt-amperes, using line-to-line voltage and three-phase power. Per-unit impedance is unchanged when referred across an ideal transformer.

Transformer short-circuit test

With one winding shorted and reduced voltage applied, the test yields the equivalent series resistance and leakage reactance. Core loss is negligible because the applied voltage is far below rated.

Transformer open-circuit test

With the secondary open and rated voltage applied to the primary, the test measures core loss and magnetizing current. Copper loss is negligible because only small exciting current flows.

Induction motor slip

Slip equals synchronous speed minus rotor speed, divided by synchronous speed. Synchronous speed is 120 times frequency divided by pole count, and rotor frequency equals slip times stator frequency.

Power factor correction capacitor

The required reactive power equals real power times the difference of the tangents of the initial and target angles. Capacitor bank size follows from reactive power, frequency, and voltage squared.

Symmetrical components

An unbalanced three-phase set decomposes into positive, negative, and zero sequences. Zero-sequence current flows only where a grounded neutral provides a return path, such as a grounded-wye winding.

Surge impedance loading

Surge impedance equals the square root of inductance over capacitance for a lossless line. Surge impedance loading equals line voltage squared divided by surge impedance, at which the line absorbs no reactive power.

Distance relay zones

Zone 1 covers roughly 80 to 85 percent of the protected line with no intentional delay. Zone 2 reaches about 120 to 150 percent with a delay, and Zone 3 provides remote backup.

Synchronous speed formula

Synchronous speed in revolutions per minute equals 120 times the supply frequency in hertz divided by the number of poles. A four-pole machine on 60 hertz therefore runs at 1800 rpm.

Motor efficiency

Efficiency equals output power divided by input power. Losses are copper loss in windings, core loss, friction and windage, and stray load loss, with copper loss varying as current squared.

Delta and wye line quantities

In a balanced wye connection line current equals phase current and line voltage is root three times phase voltage. In delta, line voltage equals phase voltage and line current is root three times phase current.