Digital-to-Analog and Analog-to-Digital Conversion
The exam tests the interface between the digital and analog worlds: resolution, accuracy and speed of converters, the architecture trade-offs, and the sampling rules that determine whether a conversion is valid at all.
Digital-to-analog conversion
- Resolution is Vref / 2^n, which is the size of one LSB. Full-scale output is Vref x (1 - 2^-n), not Vref.
- The binary-weighted ladder needs precise resistor ratios across a wide range; the R-2R ladder uses only two resistor values and is far easier to match on an IC.
- Key specifications: settling time, monotonicity, differential and integral non-linearity, and glitch energy at major code transitions.
Analog-to-digital conversion
- Quantization error is at most half an LSB.
- Flash uses 2^n - 1 comparators and is the fastest but low resolution; successive approximation takes about n comparisons and is the usual general-purpose choice; dual-slope is slow but accurate and rejects mains hum; sigma-delta oversamples for high resolution in audio and measurement.
- A sample-and-hold circuit keeps the input steady during conversion. Sampling must satisfy the Nyquist criterion, at least twice the highest input frequency, and an anti-alias filter must precede the sampler.
- Ideal signal-to-noise ratio is 6.02N + 1.76 dB for a full-scale sine wave with N bits.
Worked example
An 8-bit DAC has Vref = 5 V. One LSB is 5/256 = 19.53 mV. The input code 10110010 equals 128 + 32 + 16 + 2 = 178, so the output is 178 x 19.53 mV = 3.477 V. The same calculation as code/256 x Vref gives 178/256 x 5 = 3.477 V. Full-scale output is 255/256 x 5 = 4.98 V, not 5 V.
Traps that cost marks
- Dividing by 2^n - 1 when the converter is defined with 2^n steps.
- Forgetting that full scale is one LSB below Vref.
- Ignoring the anti-alias filter and losing marks on aliasing.
- Confusing conversion time with throughput once sample-and-hold and pipeline delays are included.
- Assuming flash converters are both fast and high resolution.